Search results for "fpga"

An FPGA Implementation of a Quadruple-Based Multiplier for 4D Clifford Algebra

2008

Geometric or Clifford algebra is an interesting paradigm for geometric modeling in fields as computer graphics, machine vision and robotics. In these areas the research effort is actually aimed at finding an efficient implementation of geometric algebra. The best way to exploit the symbolic computing power of geometric algebra is to support its data types and operators directly in hardware. However the natural representation of the algebra elements as variable-length objects causes some problems in the case of a hardware implementation. This paper proposes a 4D Clifford algebra in which the variable-length elements are mapped into fixed-length elements (quadruples). This choice leads to a s…

Contributions to Phase Two of AGATA electronics

2020

En el campo de la física nuclear, la espectroscopia de rayos gamma de alta resolución es un método preciso para estudiar la estructura del núcleo, extrayendo la energía y la distribución angular de los fotones gamma emitidos en las transiciones entre estados nucleares. Para obtener núcleos en un estado excitado y por tanto emitan rayos gamma, hemos de hacer chocar la materia, produciendo reacciones nucleares (espectroscopia de haz) o recurrir a desintegraciones radiactivas (espectroscopia de desintegración). Los detectores de semiconductor de germanio de alta pureza (HPGe) han demostrado tener una buena respuesta interaccionando con rayos gamma. Al igual que otros detectores de basados en s…

FPGA Implementation of a Reconfigurable 802.11 Medium Access Control

THis work describes a full implementation of a reconfigurable IEEE 802.11 Medium Access Control (MAC) in FPGA using a System on Chip (SoC) architecture. The proposed implementation has been designed with a great structural flexibility, so to ease the protocol modification, and to support Quality of Service (QoS) function. Estensive tests has been carried out showing a full compliance to the 802.11 standard timing and algorithms.

An Embedded, FPGA-based Computer Graphics Coprocessor with Native Geometric Algebra Support

2009

The representation of geometric objects and their transformation are the two key aspects in computer graphics applications. Traditionally, computer-intensive matrix calculations are involved in modeling and rendering three-dimensional (3D) scenery. Geometric algebra (aka Clifford algebra) is attracting attention as a natural way to model geometric facts and as a powerful analytical tool for symbolic calculations. In this paper, the architecture of Clifford coprocessor (CliffoSor) is introduced. CliffoSor is an embedded parallel coprocessing core that offers direct hardware support to Clifford algebra operators. A prototype implementation on a programmable gate array (FPGA) board is detailed…

A Software Defined Radio Platform Implementing a WiFi and ZigBee Receiver

2006

A successful attempt to design and implement a multi-standard compliant Basebnd Processor is here presented. By exploiting the potential of FPGA's reconfigurability, the received signal from RF stage have been processed in order to properly decode frames of IEEE 802.11 (WiFi) and IEEE 802.15.4 (ZigBee) protocols. both falling within the ISM band (centered at 2.45GHz). The experimental implementation carried out is a practical demonstration of the Software Defined Radio concept.

Graphic Coprocessors with Native Clifford Algebra Support

2009

HDR-ARtiSt: High Dynamic Range Advanced Real-Time Imaging System

2012

International audience; This paper describes the HDR-ARtiSt hardware platform, a FPGA-based architecture that can produce a real- time high dynamic range video from successive image acquisition. The hardware platform is built around a standard low dynamic range (LDR) CMOS sensor and a Virtex 5 FPGA board. The CMOS sensor is a EV76C560 provided by e2v. This 1.3 Megapixel device offers novel pixel integration/readout modes and em- bedded image pre-processing capabilities including multiframe acquisition with various exposure times. Our approach consists of a hardware architecture with different algorithms: double exposure control during image capture, building of an HDR image by combining the…

Echo cancellation system for iso-frequency repeaters : contribution to the development of a new generation digital repeater

2014

On-frequency repeaters are a cost-effective solution to extend coverage and enhance wireless communications, especially in shadow areas. However, coupling between the receiving antenna and the transmitting antenna, called radio frequency echo, increases modulation errors and creates oscillations in the system when the echo power is high. According to the communication standards, extremely weak echoes decrease the transmission rate, while strong echoes damage electroni ccircuits because of power peaks. This thesis aims at characterizing the echo phenomenon under different modulations, and proposing an optimized solution directly integrated to industry. We have turned to digital solutions esp…

Power calculation of multi-band signals: design and implementation on FPGA

2017

International audience

Development of a Fractional PI controller in an FPGA environment for a Robust High-Performance PMSM Electrical Drive

2021

This paper proposes the application of a Fractional Order PI (FOPI) in the speed loop of a high performance PMSM drive to obtain both speed tracking and load rejection performance with a 1-DOF Proportional Integral (PI) controller and 2-DOF Integral Proportional (IP) controller. Hardware validation was implemented in Field Programmable Gate Array on the LabVIEW environment, based on the National Instruments System-on-Module sbRIO-9651 with Xilinx Zynq-7020. Simulation and experimental results are presented to comparing the performance of a PI, IP and FOPI controllers in the speed loop of a Field Oriented Control (FOC) of a Permanent Magnet Synchronous Motor (PMSM).