Search results for "integrated circuit"
showing 10 items of 130 documents
Reconfigurable digital instrumentation based on FPGA
2004
A novel application of FPGA to realize digital test equipment is proposed. It takes advantage of the dynamic reconfigurability of FPGAs so easily tailoring custom test functions in the same instrument. This results in high effective, compact and low cost instruments.
Magnetic Tunnel Junction (MTJ) Sensors for Integrated Circuits (IC) Electric Current Measurement
2013
We report on MgO Magnetic Tunnel Junction (MTJ) devices focusing on their potential application in the measurement of electrical current at the integrated circuit level. Single devices and full bridges have been specifically developed for this purpose. A sort of different designs regarding their geometry arrangement as well as the number of constitutive elements have been tested. Experimental characterization has been performed and results including impedance and sensitivity measurements are given.
Quasifractal planar microstrip resonators for microwave circuits
1999
We propose a new shape for microwave planar circuits using the self-similarity of the fractal geometry. This new shape allows the generation of numerous resonant frequencies for this microwave planar resonator due to the surface's encasing. The resonant frequency assessment can be useful for the concept of filters or wide frequency band matching loads as examples, without consuming circuit surface. ©1999 John Wiley & Sons, Inc. Microwave Opt Technol Lett 21: 433–436, 1999.
Can Atmospheric Neutrons Induce Soft Errors in NAND Floating Gate Memories?
2009
Atmospheric neutrons can interact with the matter inside a microelectronic chip and generate ionizing particles, which in turn can change the state of one or more memory bits [soft error (SE)]. In this letter, we show that SEs are possible in Flash memories, although with extremely low probabilities. While this problem will increase for future technologies, we do not expect SEs to be the reliability limiting factor for further floating gate scaling.
Efficient pipeline FFT processors for WLAN MIMO-OFDM systems
2005
The most area-efficient pipeline FFT processors for WLAN MIMO-OFDM systems are presented. It is shown that although the R2/sup 3/SDF architecture is the most area-efficient approach for implementing pipeline FFT processors, RrMDC architectures are more efficient in MIMO-OFDM systems when more than three channels are used.
A Novel Approach to the Characterization and Modelig of Microwave Transistor Packages
1994
A novel approach to the characterization and modeling of microwave transistor packages through dedicated VNA measurements is presented. By combining a multi-step partitioning method with the use of purposely realized - but technologically simple - "package style" test devices, the proposed technique permits to derive in a systematic manner an equivalent circuit for both the transistor package and the test-fixture mount employed for the characterization. Since it does not rely on the indirect, optimization-based, conventional extraction methods of the literature, nor on a simplified circuit structure for the overall parasitic fourport embedding the active device, it is able to provide a high…
Label swapper device for spectral amplitude coded optical packet networks monolithically integrated on InP
2011
In this paper the design, fabrication and experimental characterization of an spectral amplitude coded (SAC) optical label swapper monolithically integrated on Indium Phosphide (InP) is presented. The device has a footprint of 4.8x1.5 mm 2 and is able to perform label swapping operations required in SAC at a speed of 155 Mbps. The device was manufactured in InP using a multiple purpose generic integration scheme. Compared to previous SAC label swapper demonstrations, using discrete component assembly, this label swapper chip operates two order of magnitudes faster. © 2011 Optical Society of America.
Giant Magnetoresistance (GMR) sensors for 0.35µm CMOS technology sub-mA current sensing
2014
This paper reports on the design and fabrication of microelectronic structures for non-invasive indirect electric current sensing at the IC level. A 0.35 ?m CMOS ASIC has been specifically developed for this purpose. Then, a low temperature post-process, fully compatible with the CMOS technology, has been applied for depositing Giant Magnetoresistive (GMR) sensors. Preliminary experimental results for obtaining the sensitivity of the devices are presented. The detection limit is estimated to be about 5 ?A.
Transient Electrical Behaviour of the TF Superconducting Coils of Divertor Tokamak Test Facility During a Fast Discharge
2022
The paper is focused on the electromagnetic analysis of the Toroidal Field (TF) superconducting coils of the Divertor Tokamak Test facility (DTT) when electrical transients occur in the TF coils system: for example, during the operations of the Fast Discharge Units (FDUs) and considering also, the simultaneous occurrence of a fault condition. During the FDU intervention, a transient voltage excitation lasting few microseconds occurs at the TF coil terminals and it electrically stresses the insulations of TF coils itsef. To investigate the voltage distribution across, inside and between different Double Pancakes (DPs) of each TF coil, a lumped parameters circuital model has been developed an…
Hot Impression Die Forging Process: An Approach to Flash Design for Tool Life Improvement
2005
In impression die forging the role of the flash geometry is fundamental since a proper design of the flash land strongly influences both the complete die filling and the die wear (i.e. the die life and the related costs). In this paper an integrated approach between numerical simulations and statistical tools was developed with the aim to optimize flash thickness in order to reduce die wear and to minimize material wasting. As wear is regarded, an analytical model depending on sliding velocity, temperature, die hardness and contact pressure was utilized during the numerical simulations of the process in order to reach a wear evaluation for different values of the flash design variables. Thu…