Search results for "programma"

showing 10 items of 708 documents

Upgrade Analog Readout and Digitizing System for ATLAS TileCal Demonstrator

2013

A potential upgrade for the front-end electronics and signal digitization and data acquisition system of the ATLAS hadron calorimeter for the high luminosity Large Hadron Collider (HL-LHC) is described. A Demonstrator is being built to readout a slice of the TileCal detector. The on-detector electronics includes up to 48 Analog Front-end Boards for PMT analog signal processing, 4 Main Boards for data digitization and slow controls, 4 Daughter Boards with high speed optical links to interface the on-detector and off-detector electronics. Two super readout driver boards are used for off-detector data acquisition and fulfilling digital trigger.\n The ATLAS Tile Calorimeter on-detector electron…

PhysicsNuclear and High Energy PhysicsLarge Hadron ColliderDynamic rangebusiness.industryPhysics::Instrumentation and DetectorsDetectorElectrical engineeringData acquisitionmedicine.anatomical_structureUpgradeNuclear Energy and EngineeringAtlas (anatomy)medicineHigh Energy Physics::ExperimentElectronicsElectrical and Electronic EngineeringDetectors and Experimental TechniquesbusinessField-programmable gate arrayParticle Physics - Experiment
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A portable readout system for silicon microstrip sensors

2010

Abstract This system can measure the collected charge in one or two microstrip silicon sensors by reading out all the channels of the sensor(s), up to 256. The system is able to operate with different types (p- and n-type) and different sizes (up to 3 cm 2 ) of microstrip silicon sensors, both irradiated and non-irradiated. Heavily irradiated sensors will be used at the Super Large Hadron Collider, so this system can be used to research the performance of microstrip silicon sensors in conditions as similar as possible to the Super Large Hadron Collider operating conditions. The system has two main parts: a hardware part and a software part. The hardware part acquires the sensor signals eith…

PhysicsNuclear and High Energy PhysicsLarge Hadron Colliderbusiness.industryRadioactive sourceDetectorElectrical engineeringUSBLaserMicrostriplaw.inventionSoftwarelawbusinessField-programmable gate arrayInstrumentationNuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment
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Frontend electronics for high-precision single photo-electron timing using FPGA-TDCs

2014

Abstract The next generation of high-luminosity experiments requires excellent particle identification detectors which calls for Imaging Cherenkov counters with fast electronics to cope with the expected hit rates. A Barrel DIRC will be used in the central region of the Target Spectrometer of the planned PANDA experiment at FAIR. A single photo-electron timing resolution of better than 100 ps is required by the Barrel DIRC to disentangle the complicated patterns created on the image plane. R&D studies have been performed to provide a design based on the TRB3 readout using FPGA-TDCs with a precision better than 20 ps RMS and custom frontend electronics with high-bandwidth pre-amplifiers and …

PhysicsNuclear and High Energy PhysicsSpectrometerbusiness.industryDetectorIntegrated circuitImage planelaw.inventionTime-to-digital converterApplication-specific integrated circuitlawElectronicsField-programmable gate arraybusinessInstrumentationComputer hardwareNuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment
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High resolution Time of Flight determination based on reconfigurable logic devices for future PET/MR systems

2013

Abstract This contribution shows how to perform Time of Flight (TOF) measurements in PET systems using low-cost Field Programmable Gate Array (FPGA) devices with a resolution better of 100 ps. This is achieved with a proper management of the FPGA internal resources and with an extremely careful device calibration process including both temperature and voltage compensation. Preliminary results are reported.

PhysicsNuclear and High Energy PhysicsTime of flightVoltage compensationbusiness.industryProcess (computing)CalibrationHigh resolutionbusinessField-programmable gate arrayInstrumentationComputer hardwareNuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment
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Time of flight measurements based on FPGA and SiPMs for PET–MR

2014

Coincidence time measurements with SiPMs have shown to be suitable for PET/MR systems. The present study is based on 3 x 3 mm(2) SiPMs, LSO crystals and a conditioning signal electronic circuit. A Constant Fraction Discriminator (CFD) is used to digitalize the signals and a TDC FPGA-implemented is employed for fine time measurements. TDC capability allows processing the arrival of multiple events simultaneously, measuring times under 100 ps. The complete set-up for time measurements results on a resolution of 892 +/- 41 ps for a pair of detectors. The details of such implementation are exposed and the trade-offs of each configuration are discussed. (C) 2013 Elsevier By, All rights reserved,

PhysicsNuclear and High Energy Physicsbusiness.industryDetectorSilicon photomultipliersConstant fraction discriminatorPositron emission tomography and magnetic resonanceSignalTime-to-digital converterTime of flightTime of flightOpticsSilicon photomultiplierField Programable Gate ArrayTime-to-digital converterbusinessField-programmable gate arrayInstrumentationElectronic circuitNuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment
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Upgrade of the ATLAS Level-1 trigger with an FPGA based Topological Processor

2013

The ATLAS experiment is located at the European Centre for Nuclear Research (CERN) in Switzerland. It is designed to measure decay properties of high energetic particles produced in the protons collisions at the Large Hadron Collider (LHC). The LHC has a proton collision at a frequency of 40 MHz, and thus requires a trigger system to efficiently select events down to a manageable event storage rate of about 400Hz. Event triggering is therefore one of the extraordinary challenges faced by the ATLAS detector. The Level-1 Trigger is the first rate-reducing step in the ATLAS Trigger, with an output rate of 75kHz and decision latency of less than 2.5$\mu$s. It is primarily composed of the Calori…

PhysicsParticle physicsLarge Hadron ColliderPhysics::Instrumentation and DetectorsNuclear TheoryATLAS experimentUpgrademedicine.anatomical_structureAtlas (anatomy)Optical receiversmedicinePhysics::Accelerator PhysicsSignal processing algorithmsHigh Energy Physics::ExperimentDetectors and Experimental TechniquesNuclear ExperimentField-programmable gate array
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High-resolution multichannel Time-to-Digital Converter core implemented in FPGA for ToF measurements in SiPM-PET

2013

In this contribution, Coincidence Resolving Time (CRT) results with the developed multichannel FPGA-TDC are showed as a function of different configurations for both, the sensor bias voltage and the digitizer threshold. The dependence of the CRT with the sensor matrix temperature, the amount of SiPM active area and the crystal type are also analyzed. Preliminary measurements carried out with a crystal array of 2 mm pixel size and 10 mm height have shown time resolutions for the entire 144 SiPM two-detectors ensemble as good as 800 ps.

PhysicsTime-to-digital converterOpticsSilicon photomultiplierPixelbusiness.industryDetectorElectronic engineeringBiasingbusinessField-programmable gate arrayTemperature measurementCoincidence2013 IEEE Nuclear Science Symposium and Medical Imaging Conference (2013 NSS/MIC)
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A compact system for high precision time measurements ( < 14 ps RMS) and integrated data acquisition for a large number of channels

2011

A high precision ( < 14 ps RMS time resolution) and high channel density ( ~ 256 channels) Time to Digital Converter (TDC) module (realized in FPGAs) with integrated DAQ is presented. The data is transported over up to 8 Gigabit-Ethernet or optical links with up to 3 Gb/s. Slow-Control information is transported over the same links. It can be attached directly to the detector, which allows the elimination of long cables and crate systems. The full 256 channel TDCs are expected to use approximately 30 W electrical power. The module size is 20 cm by 23 cm. Power is provided by a galvanically isolated 48 V low noise power supply. AddOn-boards adapt to the special needs of the detector to be re…

Physicsbusiness.industryDetectorElectrical engineeringNoise (electronics)Power (physics)Time-to-digital converterData acquisitionbusinessField-programmable gate arrayInstrumentationGalvanic isolationMathematical PhysicsCommunication channelJournal of Instrumentation
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Alcune considerazioni e prospettive sul ruolo della pianificazione territoriale per la valuitazione strutturale e strategica in un processo partecipa…

2005

All'interno della procedura per la formazione del Piani territoriali di coordinamento provinciale viene proposta una metodologia per la valutazione e programmazione strutturale e strategica dei servizi d'area vasta in una visione policentrica all'interno di parchi. La procedura di valutazione della domanda e dell'offerta e quindi degli scenari di programmazione territoriale vengono strutturati in una copianificazione multilivello che coinvolge secondo i principi di sussidiarietà la programmazione regionale e le scelte localizzative a livello locale all'interno di ambiti intercomunali di ottimizzazione.

Pianificazione territoriale Servizi d'Area vasta Indicatori PTCP Programmazione Attuazione Valutazione strategica
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La ricerca sui centri storici. Giuseppe Samonà e il Piano Programma per Palermo

2014

Il volume tratta di vari aspetti del Piano Programma, ancora attuali a 30 anni di distanza e malgrado la mancanza di attuazione.

Piano ProgrammaSettore ICAR/14 - Composizione Architettonica E UrbanaSamonàcentri storicicentri storici; Piano Programma; Samonà
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