LONG TERM CHARGE RELAXATION IN SILICON SINGLE ELECTRON TRANSISTORS

2001

Single electron transistor fabricated on heavily doped silicon-on-insulator substrate

2001

Experiments on side-gated silicon single electron transistors (SET) fabricated on a heavily doped thin silicon-on-insulator substrate are reported. Some of the devices showed single-island-like and some multi-island-like behaviour, but the properties of individual samples changed with time. Single-electron gate modulation was observable up to T=100 K, at least. A slow response of SET current to a large change in gate voltage was observed, but the process speeded up under illumination.

Silicon Single Electron Transistors with Single and Multi Dot Characteristics

2000

AbstractSilicon single electron transistors (SET) with side gate have been fabricated on a heavily doped silicon-on-insulator (SOI) substrate. Samples demonstrate two types of characteristics: some of them demonstrate multiple dot behavior and one demonstrates single dot behavior in a wide temperature range. SETs demonstrate oscillations of drain-source current and changes in the width of the Coulomb blockade region with change of gate voltage at least up to 100 K. At temperature below 20 K long-term oscillations (relaxation) of source-drain current after switching the gate voltage has been observed in both multiple dot and single dot samples. Illumination affects both the characteristics o…

Silicon quantum point contact with aluminum gate

2000

Fabrication and electrical properties of silicon quantum point contacts are reported. The devices are fabricated on bonded silicon on insulator (SOI) wafers by combining CMOS process steps and e-beam lithography. Mobility of 9000 cm2 Vs−1 is measured for a 60 nm-thick SOI film at 10 K. Weak localization data is used to estimate the phase coherence length at 4.2 K The point contacts show step like behaviour in linear response conductance at 1.5 K. At 200 mK universal conductance fluctuations begin to dominate the conductance curve. The effective diameter of quantum point constrictions of the devices are estimated to be 30–40 nm. This estimate is based on TEM analysis of test structures and A…