Self-Healing of Redundant FLASH ADCs
For the design of high-speed ADCs, the traditional speed-accuracy trade-off can only be solved at the expense of power consumption. Using fast small transistors takes full advantage of technology scaling but induces large amounts of random variability. Redundancy has been proposed as a way to cope with variability in FLASH converter and open the trade-off. The offset of redundant comparators are measured and only the best candidates which have been selected are powered-up. However, the candidate selection is usually carried out in foreground and a lot of silicon area is thus occupied by comparators that will only be used once, during calibration. In this paper we show how such an approach, …
CMOS Capacitance-to-Time Converter-Based Interface for Differential Capacitive Sensors
This paper presents pre-layout simulation results on a CMOS implementation of a capacitance-to-time converter-based electronic interface for differential capacitive sensors. Its simple architecture, comprising only three operational amplifiers (OA) and a digital mixer (inverted XOR gate) allows, by properly setting the values of seven biasing resistors, to fit the working range anywhere from few fF to hundreds of pF, giving the output quasi-digital signals (T and PW) in the useful μs-ms range (appropriate for direct interfacing with general purposes microcontrollers). A couple of illustrative examples are provided.