6533b7d3fe1ef96bd12600fb
RESEARCH PRODUCT
Layout influence on microwave performance of graphene field effect transistors
Marco A. GiambraRiccardo PerniceM.h. JangAlfonso Carmelo CinoWolfram H. P. PerniceJong Hyun AhnE.f. CalandraAntonio BenfanteL ZeissSalvatore StivalaVaidotas MiseikisRomain DanneauAlessandro Busaccasubject
TechnologyMaterials science02 engineering and technologyHardware_PERFORMANCEANDRELIABILITYSettore ING-INF/01 - Elettronica01 natural scienceslaw.inventionComputer Science::Hardware ArchitectureComputer Science::Emerging Technologieslaw0103 physical sciencesHardware_INTEGRATEDCIRCUITSElectrical and Electronic EngineeringScaling010302 applied physicsbusiness.industryGrapheneComputerSystemsOrganization_COMPUTER-COMMUNICATIONNETWORKSWide-bandgap semiconductorSettore ING-INF/02 - Campi Elettromagnetici021001 nanoscience & nanotechnologyGraphene field effect transistorsSapphire substrateOptoelectronicsField-effect transistorGraphene0210 nano-technologyConstant (mathematics)businessMicrowaveddc:600MicrowaveHardware_LOGICDESIGNdescription
The authors report on an in-depth statistical and parametrical investigation on the microwave performance of graphene FETs on sapphire substrate. The devices differ for the gate-drain/source distance and for the gate length, having kept instead the gate width constant. Microwave S -parameters have been measured for the different devices. Their results demonstrate that the cut-off frequency does not monotonically increase with the scaling of the device geometry and that it exists an optimal region in the gate-drain/source and gate-length space which maximises the microwave performance.
| year | journal | country | edition | language |
|---|---|---|---|---|
| 2018-08-01 |