6533b7d4fe1ef96bd12630c0

RESEARCH PRODUCT

Fault-Tolerant Application Mapping on to ZMesh topology based Network-on-Chip Design

Nikita MandapatiP. Veda BhanuLinga Reddy CenkeramaddiSoumya J

subject

Network on a chipComputer sciencePosition (vector)020204 information systems0202 electrical engineering electronic engineering information engineeringOverhead (computing)Particle swarm optimizationFault toleranceTopology (electrical circuits)Hardware_PERFORMANCEANDRELIABILITY02 engineering and technologyTopology020202 computer hardware & architecture

description

This paper proposes Particle Swarm Optimization (PSO) based fault-tolerant application mapping on to ZMesh topology based Network-on-Chip (NoC) design. Permanent faults in application cores has been considered and performed application mapping using PSO. The major contribution of this paper is to find out the best position for the spare core to be placed in the network using PSO. Experimentations have been carried out by scaling the ZMesh network size and percentage of network faults. The results show that the proposed approach leads to minimum overhead in communication cost over fault-free result.

yearjournalcountryeditionlanguage
2020-11-092020 15th IEEE Conference on Industrial Electronics and Applications (ICIEA)
https://doi.org/10.1109/iciea48937.2020.9248099