6533b825fe1ef96bd1282a68
RESEARCH PRODUCT
Timing results using an FPGA-based TDC with large arrays of 144 SiPMs
Jose TorresAlbert AguilarAntonio GonzálezJulio MartosFilomeno SanchezLiczandro HernandezJose M. BenllochJ. SoretPablo CondeRaimundo Garcia-olcinasubject
PhysicsNuclear and High Energy PhysicsPixelbusiness.industryDetectorBiasingNoise (electronics)Time-to-digital converterFull width at half maximumSilicon radiation detectorsSilicon photomultiplierOpticsNuclear Energy and EngineeringGate arrayPositron emission tomography (PET)Nuclear medicineTEORIA DE LA SEÑAL Y COMUNICACIONESElectronic engineeringTrigger circuitsElectrical and Electronic Engineeringbusinessdescription
Silicon photomultipliers (SiPMs) have become an alternative to traditional tubes due to several features. However, their implementation to form large arrays is still a challenge especially due to their relatively high intrinsic noise, depending on the chosen readout. In this contribution, two modules composed of SiPMs with an area of roughly mm mm are used in coincidence. Coincidence resolving time (CRT) results with a field-programmable gate array, in combination with a time to digital converter, are shown as a function of both the sensor bias voltage and the digitizer threshold. The dependence of the CRT on the sensor matrix temperature, the amount of SiPM active area and the crystal type is also analyzed. Measurements carried out with a crystal array of 2 mm pixel size and 10 mm height have shown time resolutions for the entire 288 SiPM two-detector set-up as good as 800 ps full width at half maximum (FWHM).
| year | journal | country | edition | language |
|---|---|---|---|---|
| 2015-02-01 |