6533b86efe1ef96bd12cc071
RESEARCH PRODUCT
High Level Modeling and Hardware Implementation of Image Processing Algorithms Using XSG
Houcine BouroubaHakim DoghmaneSalah ToumiEl-bay BourennaneKamel Messaoudisubject
business.industryComputer scienceInterface (computing)[INFO.INFO-GR] Computer Science [cs]/Graphics [cs.GR]020207 software engineeringImage processing02 engineering and technologySystems modelingEdge detection[INFO.INFO-GR]Computer Science [cs]/Graphics [cs.GR]VHDLDigital image processing0202 electrical engineering electronic engineering information engineering020201 artificial intelligence & image processingbusinessMATLABField-programmable gate arraycomputerComputer hardwarecomputer.programming_languagedescription
International audience; Design of Systems-on-Chip has become very common especially with the remarkable advances in the field of high-level system modeling. In recent years, Matlab also offers a Simulink interface for the design of hardware systems. From a high-level specification, Matlab provides self-generation of HDL codes and/or FPGA configuration codes while providing other benefits of easy simulation. In addition, a large part of the Systems-on-Chip use at least one image processing algorithm and at the same time border detection is one of the most used algorithms. This paper presents a study and a hardware implementation of various algorithms of borders detection realized under Xilinx System-Generator. The various algorithms are implemented using Xilinx FPGA device, the simulation and synthesis results are also compared. We use the Xilinx Zed-Board for physical implementations in-the-loop.
| year | journal | country | edition | language |
|---|---|---|---|---|
| 2019-12-17 |