Search results for "VHDL"
showing 10 items of 26 documents
Sistema de transferencia de datos en el instrumento TilePPr del proyecto TileCal
2017
El proyecto surge de la implementación del nuevo sistema de lectura de datos FELIX, que aprovecha los Transceptores Gigabit incorporados en las FPGA XC7VX485T y XC7VX690T del fabricante Xilinx. Estos transceptores se usan para establecer enlaces de datos a través de fibra óptica entre la FPGA del Pre-procesador del TileCal o TilePPr (XC7VX485T) y la placa electrónica que está conectada por PCIe al servidor local (XC7VX690T), por lo que el trabajo consiste en alcanzar los siguientes objetivos: a) Poner en marcha en la FPGA XC7VX485T del Pre-procesador o TilePPr la interfaz de transferencia de datos para que sea compatible con el nuevo sistema “Enlace de intercambio en el límite frontal” o FE…
FPGA Implementation of an Adaptive Filter Robust to Impulsive Noise: Two Approaches
2011
Adaptive filters are used in a wide range of applications such as echo cancellation, noise cancellation, system identification, and prediction. Its hardware implementation becomes essential in many cases where real-time execution is needed. However, impulsive noise affects the proper operation of the filter and the adaptation process. This noise is one of the most damaging types of signal distortion, not always considered when implementing algorithms, particularly in specific hardware platforms. Field-programmable gate arrays (FPGAs) are used widely for real-time applications where timing requirements are strict. Nowadays, two main design processes can be followed for embedded system design…
Fault Injection into VHDL Models: Experimental Validation of a Fault-Tolerant Microcomputer System
1999
This work presents a campaign of fault injection to validate the dependability of a fault tolerant microcomputer system. The system is duplex with cold stand-by sparing, parity detection and a watchdog timer. The faults have been injected on a chip-level VHDL model, using an injection tool designed with this purpose. We have carried out a set of injection experiments (with 3000 injections each), injecting transient and permanent faults of types stuck-at, open-line and indetermination on both the signals and variables of the system, running a workload. We have analysed the pathology of the propagated errors, measured their latency, and calculated both detection and recovery coverage. We have…
FPGA/LST-SW Encryption Module Implementation for Satellite Remote Sensing Secure Systems
2020
The need for security of data transmitted from satellites to the ground has increased. Therefore, the need for secure onboard systems is in great demand, particularly in satellite remote sensing missions. This paper describes an approach for a secure Field Programmable Gate Arrays (FPGA) implementation of the Land Surface Temperature Split Window (LST-SW) algorithm, with objective to meat real-time requirements, area optimization and achieved higher Throughput goals to be sufficient for a secure remote sensing satellite applications and missions. The system is designed using VHDL (VHSIC Hardware Description Language) in a Highlevel design method. The experimental results demonstrate that th…
On Multiple AER Handshaking Channels Over High-Speed Bit-Serial Bidirectional LVDS Links With Flow-Control and Clock-Correction on Commercial FPGAs f…
2017
Address event representation (AER) is a widely employed asynchronous technique for interchanging “neural spikes” between different hardware elements in neuromorphic systems. Each neuron or cell in a chip or a system is assigned an address (or ID), which is typically communicated through a high-speed digital bus, thus time-multiplexing a high number of neural connections. Conventional AER links use parallel physical wires together with a pair of handshaking signals (request and acknowledge). In this paper, we present a fully serial implementation using bidirectional SATA connectors with a pair of low-voltage differential signaling (LVDS) wires for each direction. The proposed implementation …
Exploring FPGA Based Lock-in Techniques for Brain Monitoring Applications
2017
Functional Near Infrared Spectroscopy (fNIRS) systems for e-health applications usually suffer of poor signal detection mainly due to a low end-to-end signal to noise ratio of the electronics chain. Lock-In Amplifiers (LIA) historically represent a powerful technique helping to improve performances in such circumstances. In this work it has been designed and implemented a digital LIA system, based on a Zynq® Field Programmable Gate Array (FPGA), trying to explore if this technique might improve fNIRS system performances. More broadly, FPGA based solution flexibility has been investigated, with particular emphasis applied to digital filter parameters, needed in the digital LIA, and i…
Experimental Investigation on the Performances of a Multilevel Inverter Using a Field Programmable Gate Array-Based Control System
2019
The Field Programmable Gate Array (FPGA) represents a valid solution for the design of control systems for inverters adopted in many industry applications, because of both its high flexibility of use and its high-performance with respect to other types of digital controllers. In this context, this paper presents an experimental investigation on the harmonic content of the voltages produced by a three-phase, five level cascaded H-Bridge Multilevel inverter with an FPGA-based control board, aiming also to evaluate the performance of the FPGA through the implementation of the main common modulation techniques and the comparison between simulation and experimental results. The control algorithm…
Augstas veiktspējas līdzprocesora izveide darbību ar matricām realizācijai iegultajās sistēmas
2018
Attīstoties tehnoloģijām, sensori kļūst aizvien mazāki un precīzāki, aprēķini, kas saistīti ar to sniegtajiem mērijumiem kļūst aizvien sarežģītāki. Iegultajām sistēmām ir īpašas energoefektivitātes un vietas patēriņa prasības, kas uz CPU un GPU balstītus risinājumus padara nepiemērotus. Pētījuma mērķis ir izstrādāt augstas veiktspējas līdzprocesoru matricu operācijām iegultajās sistēmas. Darba ietvaros tika veikta literatūras analīze, izstrādāts līdzprocesora prototips un veikts salīdzinājums ar alternatīviem risinājumiem. Pētījuma rezultātā uz FPGA, izmantojot VHDL valodu, tika izstrādāts 4x4 matricu operāciju līdzprocesora prototips ar 12MHz taktsātrumu, novērtēts resursu apjoms, lai impl…
Experimental analysis with FPGA controller-based of MC PWM techniques for three-phase five level cascaded H-bridge for PV applications
2016
The FPGA represents a valid solution for the design of control systems for inverters adopted in the field of PV systems because of their high flexibility of use. This paper presents an experimental analysis of the MC SPWM techniques for a three-phase, five-level, cascaded H-Bridge inverter with FPGA controller-based. Several control algorithms are implemented by means of the VHDL programming language and the output voltage waveforms obtained from the main PWM techniques are compared in terms of THD%. Simulation and experimental results are analysed, compared and discussed.
Exploring FPGA‐Based Lock‐In Techniques for Brain Monitoring Applications
2017
Functional near‐infrared spectroscopy (fNIRS) systems for e‐health applications usually suffer from poor signal detection, mainly due to a low end‐to‐end signal‐to‐noise ratio of the electronics chain. Lock‐in amplifiers (LIA) historically represent a powerful technique helping to improve performance in such circumstances. In this work a digital LIA system, based on a Zynq® field programmable gate array (FPGA) has been designed and implemented, in an attempt to explore if this technique might improve fNIRS system performance. More broadly, FPGA‐based solution flexibility has been investigated, with particular emphasis applied to digital filter parameters, needed in the digital LIA, and its …