Search results for " CIRCuiTS"
showing 10 items of 187 documents
Quasi‐digital front‐ends for current measurement in integrated circuits with giant magnetoresistance technology
2014
In this study, the authors report on two different electronic interfaces for low-power integrated circuits electric current monitoring through current-to-frequency (I-f) conversion schemes. This proposal displays the intrinsic advantages of the quasi-digital systems regarding direct interfacing and self-calibrating capabilities. In addition, as current-sensing devices, they have made use of the giant magnetoresistance (GMR) technology because of its high sensitivity and compatibility with standard complementary metal oxide semiconductor processes. Single elements and Wheatstone bridges based on spin-valves and magnetic tunnel junctions have been considered. In this sense, schematic-level si…
Fault-Tolerant Application Mapping on to ZMesh topology based Network-on-Chip Design
2020
This paper proposes Particle Swarm Optimization (PSO) based fault-tolerant application mapping on to ZMesh topology based Network-on-Chip (NoC) design. Permanent faults in application cores has been considered and performed application mapping using PSO. The major contribution of this paper is to find out the best position for the spare core to be placed in the network using PSO. Experimentations have been carried out by scaling the ZMesh network size and percentage of network faults. The results show that the proposed approach leads to minimum overhead in communication cost over fault-free result.
Active snubber network design and implementation on the primary side of an isolated Ćuk converter realizing soft-switching for efficiency …
2008
This paper describes the process of improving the efficiency of an existing isolated DC/DC converter based on CUK topology with secondary side synchronous rectification, by means of the introduction of an active snubber network on the primary side. The snubber circuit reduces to zero the switching losses during the off-time interval of secondary SR. In particular, the efficiency improvement is due to the elimination of the primary MOSFET Coss output capacitance losses, and mainly of the reverse recovery losses on the secondary SR MOSFET. However, the insertion of the active snubber creates itself additional losses in the circuit, and therefore to measure the really introduced benefit it is …
Designing Frame Relay WAN Networks with Trade-Off between Link Cost and Performance
2014
This paper is focused on the problem of designing a Wide Area Network topology with trade-off between link cost and response time to users. The L2 technology chosen for the research is a Frame Relay based solution. The link capacities in the network and the routes used by packets are determined in a way to minimize network cost and response time at the same time. In FR networks link capacity corresponds directly to CIR parameter which makes the presented numerical results very useful in practice, especially during preliminary network design in the Design Phase of the PPDIOO methodology.
Transient cortical circuits match spontaneous and sensory-driven activity during development.
2020
At the earliest developmental stages, spontaneous activity synchronizes local and large-scale cortical networks. These networks form the functional template for the establishment of global thalamocortical networks and cortical architecture. The earliest connections are established autonomously. However, activity from the sensory periphery reshapes these circuits as soon as afferents reach the cortex. The early-generated, largely transient neurons of the subplate play a key role in integrating spontaneous and sensory-driven activity. Early pathological conditions—such as hypoxia, inflammation, or exposure to pharmacological compounds—alter spontaneous activity patterns, which subsequently in…
A Portable Readout System for Microstrip Silicon Sensors (ALIBAVA)
2009
A readout system for microstrip silicon sensors has been developed. This system is able to measure the collected charge in one or two microstrip silicon sensors by reading out all the channels of the sensor(s), up to 256. The system can operate either with non-irradiated and irradiated sensors as well as with n-type and p-type microstrip silicon sensors. Heavily irradiated sensors will be used at the Super Large Hadron Collider, so this system can be used to research the performance of microstrip silicon sensors in conditions as similar as possible to the Super Large Hadron Collider operating conditions. The system has two main parts: a hardware part and a software part. The hardware part a…
The Mu3e Data Acquisition
2020
The Mu3e experiment aims to find or exclude the lepton flavour violating decay $\mu^+\to e^+e^-e^+$ with a sensitivity of one in 10$^{16}$ muon decays. The first phase of the experiment is currently under construction at the Paul Scherrer Institute (PSI, Switzerland), where beams with up to 10$^8$ muons per second are available. The detector will consist of an ultra-thin pixel tracker made from High-Voltage Monolithic Active Pixel Sensors (HV-MAPS), complemented by scintillating tiles and fibres for precise timing measurements. The experiment produces about 100 Gbit/s of zero-suppressed data which are transported to a filter farm using a network of FPGAs and fast optical links. On the filte…
Demonstration of background rejection using deep convolutional neural networks in the NEXT experiment
2021
[EN] Convolutional neural networks (CNNs) are widely used state-of-the-art computer vision tools that are becoming increasingly popular in high-energy physics. In this paper, we attempt to understand the potential of CNNs for event classification in the NEXT experiment, which will search for neutrinoless double-beta decay in Xe-136. To do so, we demonstrate the usage of CNNs for the identification of electron-positron pair production events, which exhibit a topology similar to that of a neutrinoless double-beta decay event. These events were produced in the NEXT-White high-pressure xenon TPC using 2.6 MeV gamma rays from a Th-228 calibration source. We train a network on Monte Carlo-simulat…
A dynamic load-balancing algorithm for molecular dynamics simulation on multi-processor systems
1991
Abstract A new algorithm for dynamic load-balancing on multi-processor systems and its application to the molecular dynamics simulation of the spinodal phase separation are presented. The load-balancer is distributed among the processors and embedded in the application itself. Tests performed on a transputer network show that the load-balancer behaves almost ideally in this application. The same approach can be easily extended to different multi-processor topologies or applications.
PSA Depletion Induces the Differentiation of Immature Neurons in the Piriform Cortex of Adult Mice
2021
Immature neurons are maintained in cortical regions of the adult mammalian brain. In rodents, many of these immature neurons can be identified in the piriform cortex based on their high expression of early neuronal markers, such as doublecortin (DCX) and the polysialylated form of the neural cell adhesion molecule (PSA-NCAM). This molecule plays critical roles in different neurodevelopmental events. Taking advantage of a DCX-CreERT2/Flox-EGFP reporter mice, we investigated the impact of targeted PSA enzymatic depletion in the piriform cortex on the fate of immature neurons. We report here that the removal of PSA accelerated the final development of immature neurons. This was revealed by a h…