Search results for " array"
showing 10 items of 895 documents
Design and Validation of a FPGA-Based HIL Simulator for Minimum Losses Control of a PMSM
2021
This work examines the FPGA programmable logic platforms applied to minimum losses control of a Permanent Magnet Synchronous Motor (PMSM), which represents a flexible solution for the implementation of an advanced digital control algorithm, given their intrinsic parallel structure and the capability to be directly reprogrammable in the field. In particular, design and validation of a FPGA-based Hardware-In-the-Loop (HIL) simulator is proposed, by investigating about data format, quantization and discretization effects and other issues arising during the experimental validation of a controller prototype, in order to reduce the embedded software development cycle and test control systems. The…
Implementation of JPEG2000 arithmetic decoder using dynamic reconfiguration of FPGA
2005
This paper describes implementation of a part of JPEG2000 algorithm (MQ-Decoder and arithmetic decoder) on a FPGA board using dynamic reconfiguration. Comparison between static and dynamic reconfiguration is presented and new analysis criteria (time performance, logic cost, spatio-temporal efficiency) are defined. MQ-decoder and arithmetic decoder can be classified in the most attractive case for dynamic reconfiguration implementation: applications without parallelism by functions. This implementation is done on an architecture designed to study dynamic reconfiguration of FPGAs: the ARDOISE architecture. The implementation obtained, based on four partial configurations of arithmetic decoder…
Cost comparison of image rotation implantations on static and dynamic Reconfigurable FPGAs
2002
FPGA components are widely used today to perform various algorithms (digital filtering) in real time. The emergence of Dynamically Reconfigurable (DR) FPGAs made it possible to reduce the number of necessary resources to carry out an image processing application (tasks chain). We present in this article an image processing application (image rotation) that exploits the FPGA 's dynamic reconfiguration feature. A comparison is undertaken between the dynamic and static reconfiguration by using two criteria, cost and performance criteria. For the sake of testing the validity of our approach in terms of Algorithm and Architecture Adequacy, we realized an AT40K40 based board ARDOISE.
Automated Integration and Communication Synthesis of Reconfigurable MPSoC Platform
2007
The communication synthesis is the main problematic in the multiprocessor system-on-chip (MPSoC). To resolve this problem, several methodologies can be used. These methodologies require automated methods to specify, generate and optimize the hardware, software, and the architectural interfaces between them. In this paper, we present a methodology flow for hardware-software communication synthesis for multiprocessor system-on-chip platform which are dedicated to streaming applications. Our methodology consists of high level architecture communication synthesis from functional description of the MPSoC design. The solution that we propose consists in synthesizing a custom bus architecture for …
A systems biology perspective on cholangiocellular carcinoma development: focus on MAPK-signaling and the extracellular environment.
2008
Background/Aims Multiple genes have been implicated in cholangiocellular carcinoma (CCC) development. However, the overall neoplastic risk is likely associated with a much lower number of critical physiological pathways. Methods To investigate this hypothesis, we extracted all published genetic associations for the development of CCC from PubMed (genetic association studies, but also studies associating genes and CCC in general, i.e. functional studies in cell lines, genetic studies in humans, knockout mice etc.) and integrated CCC microarray data. Results We demonstrated the MAPK pathway was consistently enriched in CCC. Comparing our data to genetic associations in HCC often successfully …
Suffix array and Lyndon factorization of a text
2014
Abstract The main goal of this paper is to highlight the relationship between the suffix array of a text and its Lyndon factorization. It is proved in [15] that one can obtain the Lyndon factorization of a text from its suffix array. Conversely, here we show a new method for constructing the suffix array of a text that takes advantage of its Lyndon factorization. The surprising consequence of our results is that, in order to construct the suffix array, the local suffixes inside each Lyndon factor can be separately processed, allowing different implementative scenarios, such as online, external and internal memory, or parallel implementations. Based on our results, the algorithm that we prop…
Spatio-Temporal Analysis of Urban Acoustic Environments with Binaural Psycho-Acoustical Considerations for IoT-Based Applications
2018
Sound pleasantness or annoyance perceived in urban soundscapes is a major concern in environmental acoustics. Binaural psychoacoustic parameters are helpful to describe generic acoustic environments, as it is stated within the ISO 12913 framework. In this paper, the application of a Wireless Acoustic Sensor Network (WASN) to evaluate the spatial distribution and the evolution of urban acoustic environments is described. Two experiments are presented using an indoor and an outdoor deployment of a WASN with several nodes using an Internet of Things (IoT) environment to collect audio data and calculate meaningful parameters such as the sound pressure level, binaural loudness and binaural sharp…
Incidental Detection of a Chromosomal Aberration by Array-CGH in an Early Prenatal Diagnosis for Monogenic Disease on Coelomic Fluid
2022
Background: Turner syndrome is a rare genetic condition in which a female is partly or completely missing an X chromosome. Signs and symptoms vary among those affected. In fetuses that survive at birth and without congenital malformations, the prognosis is usually positive, but it has high lethality in utero, especially in the first trimester of pregnancy. Methods: We report a case of monosomy X detected during a prenatal diagnosis for beta thalassemia on coelomic fluid (CF) at the VIII week of gestation. Beta globin gene analysis, whole genome amplification (WGA), quantitative fluorescent PCR and array comparative genomic hybridization (array-CGH) were performed on DNA extracted from CF. R…
FPGA implementation of Spiking Neural Networks supported by a Software Design Environment
2011
Abstract This paper is focused on the creation of Spiking Neural Networks (SNN) in hardware due to their advantages for certain problem solving and their similarity to biological neural system. One of the main uses of this neural structure is pattern classification. The chosen model for the spiking neuron is the Spike Response Model (SRM). For SNN design and implementation, a software application has been developed to provide easy creation, simulation and automatic generation of the hardware model. VHDL was used for the hardware model. This paper describes the functionality of SNN and the design procedure followed to obtain a working neural system in both software and hardware. Designed VHD…
FPGA implementation of Spiking Neural Networks
2012
Abstract Spiking Neural Networks (SNN) have optimal characteristics for hardware implementation. They can communicate among neurons using spikes, which in terms of logic resources, means a single bit, reducing the logic occupation in a device. Additionally, SNN are similar in performance compared to other neural Artificial Neural Network (ANN) architectures such as Multilayer Perceptron, and others. SNN are very similar to those found in the biological neural system, having weights and delays as adjustable parameters. This work describes the chosen models for the implemented SNN: Spike Response Model (SRM) and temporal coding is used. FPGA implementation using VHDL language is also describe…