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RESEARCH PRODUCT
FPGA implementation of Spiking Neural Networks
Juan F. Guerrero-martinezAlfredo Rosado-muñozManuel Bataller-mompeánsubject
Spiking neural networkPhysical neural networkQuantitative Biology::Neurons and CognitionArtificial neural networkbusiness.industryTime delay neural networkComputer scienceMultilayer perceptronComputer Science::Neural and Evolutionary ComputationArtificial intelligencebusinessField-programmable gate arrayHardware_LOGICDESIGNdescription
Abstract Spiking Neural Networks (SNN) have optimal characteristics for hardware implementation. They can communicate among neurons using spikes, which in terms of logic resources, means a single bit, reducing the logic occupation in a device. Additionally, SNN are similar in performance compared to other neural Artificial Neural Network (ANN) architectures such as Multilayer Perceptron, and others. SNN are very similar to those found in the biological neural system, having weights and delays as adjustable parameters. This work describes the chosen models for the implemented SNN: Spike Response Model (SRM) and temporal coding is used. FPGA implementation using VHDL language is also described, detailing logic resources usage and speed of operation for a simple pattern recognition problem.
year | journal | country | edition | language |
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2012-01-01 | IFAC Proceedings Volumes |