0000000000118766
AUTHOR
Manuel Bataller-mompeán
showing 23 related works from this author
Apnea detection using cardiac rhythm and its hardware implementation
2009
Abstract Sleep apnea is a sleep disorder characterized by pauses in breathing during sleep. Its detection is very important to avoid important disorders in the patients such as daytime fatigue and sleepiness, which might be very dangerous in certain work places. One of the methods to detect apnea is based in the cardiac rhythm, measuring some parameters which indicate the presence of respiration abnormalities. This work describes the used algorithm to detect apnea and its hardware implementation in an FPGA device for real time detection using the electrocardiogram (ECG) signal.
Event-based encoding from digital magnetic compass and ultrasonic distance sensor for navigation in mobile systems
2016
Event-based encoding reduces the amount of generated data while keeping relevant information in the measured magnitude. While this encoding is mostly associated with spiking neuromorphic systems, it can be used in a broad spectrum of tasks. The extension of event-based data representation to other sensors would provide advantages related to bandwidth reduction, lower computing requirements, increased processing speed and data processing. This work describes two event-based encoding procedures (magnitude-event and rate-event) for two sensors widely used in industry, especially for navigation in mobile systems: digital magnetic compass and ultrasonic distance sensor. Encoded data meet Address…
Hardware implementation of real-time Extreme Learning Machine in FPGA: Analysis of precision, resource occupation and performance
2016
Extreme Learning Machine (ELM) on-chip learning is implemented on FPGA.Three hardware architectures are evaluated.Parametrical analysis of accuracy, resource occupation and performance is carried out. Display Omitted Extreme Learning Machine (ELM) proposes a non-iterative training method for Single Layer Feedforward Neural Networks that provides an effective solution for classification and prediction problems. Its hardware implementation is an important step towards fast, accurate and reconfigurable embedded systems based on neural networks, allowing to extend the range of applications where neural networks can be used, especially where frequent and fast training, or even real-time training…
FPGA implementation of Spiking Neural Networks supported by a Software Design Environment
2011
Abstract This paper is focused on the creation of Spiking Neural Networks (SNN) in hardware due to their advantages for certain problem solving and their similarity to biological neural system. One of the main uses of this neural structure is pattern classification. The chosen model for the spiking neuron is the Spike Response Model (SRM). For SNN design and implementation, a software application has been developed to provide easy creation, simulation and automatic generation of the hardware model. VHDL was used for the hardware model. This paper describes the functionality of SNN and the design procedure followed to obtain a working neural system in both software and hardware. Designed VHD…
Analysis of the Modifications in the Spectral and Morphologic Regularity during Ventricular Fibrillation Produced by Physical Exercise and the Use of…
2015
Chronic physical exercise modifies cardiac activity improving response to malignant arrhythmia and, specifically, ventricular fibrillation (VF). Drug administration as glibenclamide, responsible for K + ATP channel blocking, is also generating a positive response against fibrillation.
ECG Analysis for Ventricular Fibrillation Detection Using a Boltzmann Network
2015
Arrhythmias consist on electrical alterations in the heart beat control. They can be identified by means of surface ECG leads. The main goal of this work is to provide a signal classification based on ECG signal waveform in the time-frequency domain especially targeted to Ventricular Fibrillation detection. The use of a classifier based on a Boltzmann network is proposed. However, a previous signal preprocessing is also required so that the Boltzmann network is fed with the appropriate data. In this case, an R-wave detector is used; after that, the Pseudo Wigner-Ville time-frequency distribution is obtained. This distribution is used to train and test the network, which handles it as an ima…
A Novel Systolic Parallel Hardware Architecture for the FPGA Acceleration of Feedforward Neural Networks
2019
New chips for machine learning applications appear, they are tuned for a specific topology, being efficient by using highly parallel designs at the cost of high power or large complex devices. However, the computational demands of deep neural networks require flexible and efficient hardware architectures able to fit different applications, neural network types, number of inputs, outputs, layers, and units in each layer, making the migration from software to hardware easy. This paper describes novel hardware implementing any feedforward neural network (FFNN): multilayer perceptron, autoencoder, and logistic regression. The architecture admits an arbitrary input and output number, units in la…
LABCENTER. A remote laboratory system platform
2011
Abstract A web system server especially suited for remote laboratories has been developed. Typical e-learning systems do not offer the possibility to perform a remote laboratory where real experiments can be done online, accessing real hardware located at the University facilities. Allowing students to connect to hardware systems remotely provides them with additional knowledge about real devices; very often, real laboratory devices are time or space restricted. The proposed LABCENTER platform is a general frame designed for remote laboratories connection. The platform is designed to allow an authorized student to connect to hardware systems. As direct hardware systems allow only a single u…
Moving Learning Machine Towards Fast Real-Time Applications: A High-Speed FPGA-based Implementation of the OS-ELM Training Algorithm
2018
Currently, there are some emerging online learning applications handling data streams in real-time. The On-line Sequential Extreme Learning Machine (OS-ELM) has been successfully used in real-time condition prediction applications because of its good generalization performance at an extreme learning speed, but the number of trainings by a second (training frequency) achieved in these continuous learning applications has to be further reduced. This paper proposes a performance-optimized implementation of the OS-ELM training algorithm when it is applied to real-time applications. In this case, the natural way of feeding the training of the neural network is one-by-one, i.e., training the neur…
Hardware-accelerated spike train generation for neuromorphic image and video processing
2014
Recent studies concerning Spiking Neural Networks show that they are a powerful tool for multiple applications as pattern recognition, image tracking, and detection tasks. The basic functional properties of SNN reside in the use of spike information encoding as the neurons are specifically designed and trained using spike trains. We present a novel and efficient frequency encoding algorithm with Gabor-like receptive fields using probabilistic methods and targeted to FPGA for online pro-cessing. The proposed encoding is versatile, modular and, when applied to images, it is able to perform simple image transforms as edge detection, spot detection or removal, and Gabor-like filtering without a…
Frequency spike encoding using Gabor-like receptive fields
2014
Abstract Spiking Neural Networks (SNN) are a popular field of study. For a proper development of SNN algorithms and applications, special encoding methods are required. Signal encoding is the first step since signals need to be converted into spike trains as the primary input to an SNN. We present an efficient frequency encoding system using receptive fields. The proposed encoding is versatile and it can provide simple image transforms like edge detection, spot detection or removal, or Gabor-like filtering. The proposed encoding can be used in many application areas as image processing and signal processing for detection and classification.
Support Tool for the Combined Software/Hardware Design of On-Chip ELM Training for SLFF Neural Networks
2016
Typically, hardware implemented neural networks are trained before implementation. Extreme learning machine (ELM) is a noniterative training method for single-layer feed-forward (SLFF) neural networks well suited for hardware implementation. It provides fixed-time learning and simplifies retraining of a neural network once implemented, which is very important in applications demanding on-chip training. This study proposes the data flow of a software support tool in the design process of a hardware implementation of on-chip ELM learning for SLFF neural networks. The software tool allows the user to obtain the optimal definition of functional and hardware parameters for any application, and e…
Hyperspectral image classification using CNN: Application to industrial food packaging
2021
Abstract During food tray packaging, some contamination may exist due to the presence of undesired objects. It is essential to detect anomalies during the packaging process in order to discard the faulty tray and avoid human consumption. This study demonstrates the on-line classification feasibility when using hyperspectral imaging systems for real-time food packaging control by using Convolutional Neural Networks (CNN) as a classifier in heat-sealed food trays. A hyperspectral camera is used to capture individual food tray information and fed to a CNN classifier to detect faulty food trays with object contamination. The proposed system is able to detect up to eleven different contamination…
Design environment for hardware generation of SLFF neural network topologies with ELM training capability
2015
Extreme Learning Machine (ELM) is a noniterative training method suited for Single Layer Feed Forward Neural Networks (SLFF-NN). Typically, a hardware neural network is trained before implementation in order to avoid additional on-chip occupation, delay and performance degradation. However, ELM provides fixed-time learning capability and simplifies the process of re-training a neural network once implemented in hardware. This is an important issue in many applications where input data are continuously changing and a new training process must be launched very often, providing self-adaptation. This work describes a general SLFF-NN design environment to assist in the definition of neural netwo…
An Scalable matrix computing unit architecture for FPGA and SCUMO user design interface
2019
High dimensional matrix algebra is essential in numerous signal processing and machine learning algorithms. This work describes a scalable square matrix-computing unit designed on the basis of circulant matrices. It optimizes data flow for the computation of any sequence of matrix operations removing the need for data movement for intermediate results, together with the individual matrix operations’ performance in direct or transposed form (the transpose matrix operation only requires a data addressing modification). The allowed matrix operations are: matrix-by-matrix addition, subtraction, dot product and multiplication, matrix-by-vector multiplication, and matrix by scalar multiplication.…
FPGA Implementation of an Adaptive Filter Robust to Impulsive Noise: Two Approaches
2011
Adaptive filters are used in a wide range of applications such as echo cancellation, noise cancellation, system identification, and prediction. Its hardware implementation becomes essential in many cases where real-time execution is needed. However, impulsive noise affects the proper operation of the filter and the adaptation process. This noise is one of the most damaging types of signal distortion, not always considered when implementing algorithms, particularly in specific hardware platforms. Field-programmable gate arrays (FPGAs) are used widely for real-time applications where timing requirements are strict. Nowadays, two main design processes can be followed for embedded system design…
Simplified spiking neural network architecture and STDP learning algorithm applied to image classification
2015
Spiking neural networks (SNN) have gained popularity in embedded applications such as robotics and computer vision. The main advantages of SNN are the temporal plasticity, ease of use in neural interface circuits and reduced computation complexity. SNN have been successfully used for image classification. They provide a model for the mammalian visual cortex, image segmentation and pattern recognition. Different spiking neuron mathematical models exist, but their computational complexity makes them ill-suited for hardware implementation. In this paper, a novel, simplified and computationally efficient model of spike response model (SRM) neuron with spike-time dependent plasticity (STDP) lear…
Hardware implementation of a robust adaptive filter: Two approaches based in High-Level Synthesis design tools
2009
Abstract Adaptive filters are used in a wide range of applications. Impulsive noise affects the proper operation of the filter and the adaptation process. This noise is one of the most damaging types of signal distortion, not always considered when implementing algorithms. Field Programmable Gate Array (FPGA) are widely used for applications where timing requirements are strict. Nowadays, two main design processes can be followed, namely, Hardware Description Language (HDL) and a High Level Synthesis (HLS) design tool for embedded system design. This paper describes the FPGA implementation of an adaptive filter robust to impulsive noise using two approaches based in HLS and the implementati…
Less Data Same Information for Event-Based Sensors: A Bioinspired Filtering and Data Reduction Algorithm
2018
Sensors provide data which need to be processed after acquisition to remove noise and extract relevant information. When the sensor is a network node and acquired data are to be transmitted to other nodes (e.g., through Ethernet), the amount of generated data from multiple nodes can overload the communication channel. The reduction of generated data implies the possibility of lower hardware requirements and less power consumption for the hardware devices. This work proposes a filtering algorithm (LDSI&mdash
AMCAS: Advanced Methods for the Co-Design of Complex Adaptive Systems
2006
Abstract This work proposes a new approximation to design and program Complex Adaptive Systems (CAS), these systems comprise neural network, intelligent agents, genetic algorithms, support vector machines and artificial intelligence systems in general. Due to the complexity of such systems, it is necessary to build a design environment able to ease the design work, allowing reusability and easy migration to hardware and/or software. Ptolemy II is used as the base system to simulate and evaluate the designs with different Models of Computation so that an optimum decision about the hardware or software implementation platform can be taken.
Detection of Ventricular Fibrillation Using the Image from Time-Frequency Representation and Combined Classifiers without Feature Extraction
2018
Due the fact that the required therapy to treat Ventricular Fibrillation (V F) is aggressive (electric shock), the lack of a proper detection and recovering therapy could cause serious injuries to the patient or trigger a ventricular fibrillation, or even death. This work describes the development of an automatic diagnostic system for the detection of the occurrence of V F in real time by means of the time-frequency representation (T F R) image of the ECG. The main novelties are the use of the T F R image as input for a classification process, as well as the use of combined classifiers. The feature extraction stage is eliminated and, together with the use of specialized binary classifiers, …
FPGA implementation of Spiking Neural Networks
2012
Abstract Spiking Neural Networks (SNN) have optimal characteristics for hardware implementation. They can communicate among neurons using spikes, which in terms of logic resources, means a single bit, reducing the logic occupation in a device. Additionally, SNN are similar in performance compared to other neural Artificial Neural Network (ANN) architectures such as Multilayer Perceptron, and others. SNN are very similar to those found in the biological neural system, having weights and delays as adjustable parameters. This work describes the chosen models for the implemented SNN: Spike Response Model (SRM) and temporal coding is used. FPGA implementation using VHDL language is also describe…
Real-Time Localization of Epileptogenic Foci EEG Signals: An FPGA-Based Implementation
2020
The epileptogenic focus is a brain area that may be surgically removed to control of epileptic seizures. Locating it is an essential and crucial step prior to the surgical treatment. However, given the difficulty of determining the localization of this brain region responsible of the initial seizure discharge, many works have proposed machine learning methods for the automatic classification of focal and non-focal electroencephalographic (EEG) signals. These works use automatic classification as an analysis tool for helping neurosurgeons to identify focal areas off-line, out of surgery, during the processing of the huge amount of information collected during several days of patient monitori…