Search results for " array"
showing 10 items of 895 documents
Production of cecropin A in transgenic rice plants has an impact on host gene expression.
2008
Summary Expression of the cecropin A gene in rice confers resistance to the rice blast fungus Magnaporthe oryzae. In this study, a polymerase chain reaction-based suppression subtractive hybridization approach was used to generate a cDNA macroarray from the elite japonica rice (Oryza sativa L.) cultivar ‘Senia’. Gene expression studies revealed that the expression of components of the protein secretory and vesicular transport machinery is co-ordinately activated at the pre-invasive stage of infection of rice by the blast fungus. Comparisons of gene expression between wild-type and cecropin A plants revealed the over-expression of genes involved in protection against oxidative stress in tran…
Detection and discrimination of organophosphorus pesticides in water by using a colorimetric probe array
2014
[EN] Detection and discrimination of several organophosphorus pesticides in water using a colorimetric probe array containing twelve dyes has been achieved. A clear discrimination for malathion, leptophos, dichlorvos, dibrom and diazinon was observed. The array was used to determine the concentration of diazinon in orange leaves
Proton-irradiated breast cells: molecular points of view
2019
Abstract Breast cancer (BC) is the most common cancer in women, highly heterogeneous at both the clinical and molecular level. Radiation therapy (RT) represents an efficient modality to treat localized tumor in BC care, although the choice of a unique treatment plan for all BC patients, including RT, may not be the best option. Technological advances in RT are evolving with the use of charged particle beams (i.e. protons) which, due to a more localized delivery of the radiation dose, reduce the dose administered to the heart compared with conventional RT. However, few data regarding proton-induced molecular changes are currently available. The aim of this study was to investigate and descri…
The genetic heritage of Alpine local cattle breeds using genomic SNP data
2020
Abstract Background Assessment of genetic diversity and population structure provides important control metrics to avoid genetic erosion, inbreeding depression and crossbreeding between exotic and locally-adapted cattle breeds since these events can have deleterious consequences and eventually lead to extinction. Historically, the Alpine Arc represents an important pocket of cattle biodiversity with a large number of autochthonous breeds that provide a fundamental source of income for the entire regional economy. By using genotype data from medium-density single nucleotide polymorphism (SNP) arrays, we performed a genome-wide comparative study of 23 cattle populations from the Alpine Arc an…
Visualization of Memory Map Information in Embedded System Design
2018
Data compression is a common requirement for displaying large amounts of information. The goal is to reduce visual clutter. The approach given in this paper uses an analysis of a data set to construct a visual representation. The visualization is compressed using the address ranges of the memory structure. This method produces a compressed version of the initial visualization, retaining the same information as the original. The presented method has been implemented as a Memory Designer tool for ASIC, FPGA and embedded systems using IP-XACT. The Memory Designer is a user-friendly tool for model based embedded system design, providing access and adjustment of the memory layout from a single v…
Overview and experimental analysis of MC SPWM techniques for single-phase five level cascaded H-bridge FPGA controller-based
2016
This paper presents an overview and experimental analysis of the MC SPWM techniques for single-phase cascaded H-bridge inverter. The multilevel power converters are an alternative to traditional converters known as “three-level converters”. The voltage waveforms and the related frequency spectra, which have been obtained by simulation analysis in Matlab-Simulink environment, are here reported for all the proposed modulation techniques. The simulation results have been experimentally validated through means of a DC/AC, five-level, single-phase converter prototype with an appropriate test bench.
Optimization of a Time-to-Digital Converter and a coincidence map algorithm for TOF-PET applications
2015
This contribution describes the optimization of a multichannel high resolution Time-to-Digital Converter (TDC) in a Field-Programmable Gate Array (FPGA) initially capable of obtaining time resolutions below 100ps for multiple channels. Due to its fast propagation capability it has taken advantage of the FPGA internal carry logic for accurate time measurements. Furthermore, the implementation of the TDC has been performed in different clock regions and tested with different frequencies as well, achieving improvements of up to 50% for a pair of channels. Moreover, since the TDC is potentially going to be used in a trigger system for Positron Emission Tomography (PET), the algorithm for coinci…
A reconfigurable architecture for autonomous visual-navigation
2003
This paper describes the design of a reconfigurable architecture for implementing image processing algorithms. This architecture is a pipeline of small identical processing elements that contain a programmable logic device (FPGA) and double port memories. This processing system has been adapted to accelerate the computation of differential algorithms. The log-polar vision selectively reduces the amount of data to be processed and simplifies several vision algorithms, making possible their implementation using few hard-ware resources. The reconfigurable architecture design has been devoted to implementation, and has been employed in an autonomous platform, which has power consumption, size a…
AES/FPGA Encryption Module Integration for Satellite Remote Sensing Systems: LST-SW case
2020
Satellite remote sensing embedded systems need to be secure to protect data transmission between satellites and the ground station for any threat can affects the hardware of satellite and interception of data, in addition to unauthorized access to satellite system. This research proposes an approach for a secure integration of FPGA Encryption module based on the iterative looping architecture for remote sensing algorithm and especially for the LST-SW algorithm. The target hardware used in this paper is Virtex-5 XC5VLX50T FPGA from Xilinx. Hardware Description Language was used to design the complete system. The analysis of the proposed designed shows that this implementation can achieved a …
High Level Modeling and Hardware Implementation of Image Processing Algorithms Using XSG
2019
International audience; Design of Systems-on-Chip has become very common especially with the remarkable advances in the field of high-level system modeling. In recent years, Matlab also offers a Simulink interface for the design of hardware systems. From a high-level specification, Matlab provides self-generation of HDL codes and/or FPGA configuration codes while providing other benefits of easy simulation. In addition, a large part of the Systems-on-Chip use at least one image processing algorithm and at the same time border detection is one of the most used algorithms. This paper presents a study and a hardware implementation of various algorithms of borders detection realized under Xilin…