Search results for "CMOS"
showing 10 items of 120 documents
The wide-field imager for IXO: status and future activities
2010
The Wide Field Imager (WFI) of the International X-ray Observatory (IXO) is an X-ray imaging spectrometer based on a large monolithic DePFET (Depleted P-channel Field Effect Transistor) Active Pixel Sensor. Filling an area of 10 x 10 cm2 with a format of 1024 x 1024 pixels it will cover a field of view of 18 arcmin. The pixel size of 100 x 100 μm2 corresponds to a fivefold oversampling of the telescope's expected 5 arcsec point spread function. The WFI's basic DePFET structure combines the functionalities of sensor and integrated amplifier with nearly Fano-limited energy resolution and high efficiency from 100 eV to 15 keV. The development of dedicated control and amplifier ASICs allows for…
ATHENA WFI optical blocking filters development status toward the end of the instrument phase-A
2018
Copyright 2018 Society of Photo-Optical Instrumentation Engineers (SPIE). One print or electronic copy may be made for personal use only. Systematic reproduction and distribution, duplication of any material in this paper for a fee or for commercial purposes, or modification of the content of the paper are prohibited. The Wide Field Imager (WFI) is one of the two instruments of the ATHENA astrophysics space mission approved by ESA as the second large mission in the Cosmic Vision 2015-2025 Science Programme. The WFI, based on a large array of depleted field effect transistors (DEPFET), will provide imaging in the 0.2-15 keV band over a 40'x40' field of view, simultaneously with spectrally an…
A 1.3 megapixel FPGA-based smart camera for high dynamic range real time video
2013
International audience; A camera is able to capture only a part of a high dynamic range scene information. The same scene can be fully perceived by the human visual system. This is true especially for real scenes where the difference in light intensity between the dark areas and bright areas is high. The imaging technique which can overcome this problem is called HDR (High Dynamic Range). It produces images from a set of multiple LDR images (Low Dynamic Range), captured with different exposure times. This technique appears as one of the most appropriate and a cheap solution to enhance the dynamic range of captured environments. We developed an FPGA-based smart camera that produces a HDR liv…
Smart camera design for realtime High Dynamic Range imaging
2011
International audience; Many camera sensors suffer from limited dynamic range. The result is that there is a lack of clear details in displayed images and videos. This paper describes our approach to generate high dynamic range (HDR) from an image sequence while modifying exposure times for each new frame. For this purpose, we propose an FPGA-based architecture that can produce a real-time high dynamic range video from successive image acquisition. Our hardware platform is build around a standard low dynamic range CMOS sensor and a Virtex 5 FPGA board. The CMOS sensor is a EV76C560 provided by e2v. This 1.3 Megapixel device offers novel pixel integration/readout modes and embedded image pre…
HDR-ARtiSt: High Dynamic Range Advanced Real-Time Imaging System
2012
International audience; This paper describes the HDR-ARtiSt hardware platform, a FPGA-based architecture that can produce a real- time high dynamic range video from successive image acquisition. The hardware platform is built around a standard low dynamic range (LDR) CMOS sensor and a Virtex 5 FPGA board. The CMOS sensor is a EV76C560 provided by e2v. This 1.3 Megapixel device offers novel pixel integration/readout modes and em- bedded image pre-processing capabilities including multiframe acquisition with various exposure times. Our approach consists of a hardware architecture with different algorithms: double exposure control during image capture, building of an HDR image by combining the…
eISP, une architecture de calcul programmable pour l'amélioration d'images sur téléphone portable.
2009
4 pages; Today's smart phones, with their embedded high-resolution video sensors, require computing capacities that are too high to easily meet stringent silicon area and power consumption requirements (some one and a half square millimeters and half a watt) especially when programmable components are used. To develop such capacities, integrators still rely on dedicated low resolution video processing components, whose drawback is low flexibility. With this in mind, our paper presents eISP {--} a new, fully programmable Embedded Image Signal Processor architecture, now validated in {TSMC~65nm} technology to achieve a capacity of {16.8~GOPs} at {233~MHz}, for {1.5~mm$^2$} of silicon area and…
eISP: a Programmable Processing Architecture for Smart Phone Image Enhancement
2009
4 pages; Today's smart phones, with their embedded high-resolution video sensors, require computing capacities that are too high to easily meet stringent silicon area and power consumption requirements (some one and a half square millimeters and half a watt) especially when programmable components are used. To develop such capacities, integrators still rely on dedicated low resolution video processing components, whose drawback is low flexibility. With this in mind, our paper presents eISP {--} a new, fully programmable Embedded Image Signal Processor architecture, now validated in {TSMC 65nm} technology to achieve a capacity of {16.8 GOPs} at {233 MHz}, for {1.5 mm$^2$} of silicon area and…
Extensions matérielles pour processeurs embarqués de traitement d'images.
2007
12p; Le marché des imageurs embarqués est entré dans une ère nouvelle avec l'avènement des téléphones portables munis d'appareils photographiques et de caméras. Il est attendu qu'à l'horizon 2009, leur nombre dépassera celui de l'ensemble des appareils photos vendus depuis l'invention de la photographie, et ce qu'ils soient numériques ou non. Le marché des imageurs électroniques embarqués est donc un secteur porteur, notamment au travers de la téléphonie et de la visiophonie mobile. Les applications ne sont plus limitées à la simple photographie ou la transmission de vidéo ; les lecteurs de codes matrices, la reconnaissance de visages, la biométrie, ou la vision 3D sont des exemples parmi l…
Compression embarquée temps réel pour caméras rapides
2005
Les caméras rapides sont de puissants outils pour étudier, par exemple, la dynamique des fluides ou le déplacement des pièces mécaniques lors d'un processus de fabrication. Nous décrivons dans ce papier, un nouveau type de caméra rapide possédant un fonctionnement original. En effet, outre le fait qu'elle utilise comme d'autres caméras, la grande flexibilité des capteurs CMOS en termes d'acquisition (ROI), elle est novatrice au niveau du transfert des données. Celles-ci pouvant être à la fois traitées et/ou compressées en temps réel au sein même de la caméra. Le transfert peut s'effectuer alors à l'aide d'une simple connection série de type USB 2.0. On réalise ainsi l'économie d'une mémoire…
CMOS Capacitance-to-Time Converter-Based Interface for Differential Capacitive Sensors
2020
This paper presents pre-layout simulation results on a CMOS implementation of a capacitance-to-time converter-based electronic interface for differential capacitive sensors. Its simple architecture, comprising only three operational amplifiers (OA) and a digital mixer (inverted XOR gate) allows, by properly setting the values of seven biasing resistors, to fit the working range anywhere from few fF to hundreds of pF, giving the output quasi-digital signals (T and PW) in the useful μs-ms range (appropriate for direct interfacing with general purposes microcontrollers). A couple of illustrative examples are provided.