Search results for "CSTR"

showing 10 items of 45 documents

"Table 2" of "Study of the Leptonic Decays of the $Z^0$ Boson"

1990

No t-channel subtraction. Statistical errors only.

E+ E- --> E+ E-4.414E+014.752E+01Electron production88.28-95.04ElasticE+ E- ScatteringIntegrated Cross SectionData_CODINGANDINFORMATIONTHEORYHardware_ARITHMETICANDLOGICSTRUCTURESCross SectionSIGComputer Science::Information Theory
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"Table 1" of "Study of the Leptonic Decays of the $Z^0$ Boson"

1990

E+ E- final state is t-channel subtracted.

E+ E- --> TAU+ TAU-4.414E+014.752E+01Electron production88.28-95.04Integrated Cross SectionE+ E- --> LEPTON+ LEPTON-Data_CODINGANDINFORMATIONTHEORYCross SectionSIGMuon productionE+ E- --> E+ E-ElasticE+ E- --> MU+ MU-E+ E- ScatteringExclusiveHardware_ARITHMETICANDLOGICSTRUCTURESTau productionComputer Science::Information Theory
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Analysis of compressor architectures in MOS current-mode logic

2010

This paper is concerned with the design and the comparison of different compressor architectures for high performance multipliers in MOS current-mode logic (MCML). More specifically, three architectures have been designed for 3-2, 4-2 and 5-2 compressors and two architectures for 7-2 compressors. The various implementations for each type of compressor have been compared one another. This investigation indicates that the architectures based exclusively on three-level MCML gates are the most suitable for MCML implementation in terms of speed, power consumption and area. Design guidelines are provided to improve compressor performance. All the compressors were designed in a TSMC 180nm CMOS tec…

EngineeringPass transistor logicAND-OR-Invertbusiness.industryLogic familyData_CODINGANDINFORMATIONTHEORYLogic levelCompressors multipliers MOS current-mode logicSettore ING-INF/01 - ElettronicaLogic gateElectronic engineeringCurrent-mode logicHardware_ARITHMETICANDLOGICSTRUCTURESbusinessGas compressorPull-up resistor2010 17th IEEE International Conference on Electronics, Circuits and Systems
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Reconfigurable digital instrumentation based on FPGA

2004

A novel application of FPGA to realize digital test equipment is proposed. It takes advantage of the dynamic reconfigurability of FPGAs so easily tailoring custom test functions in the same instrument. This results in high effective, compact and low cost instruments.

Engineeringbusiness.industryDigital instrumentationReconfigurabilityIntegrated circuit designFPGA reconfigurable systems instrumentationSettore ING-INF/01 - ElettronicaProgrammable logic arrayReconfigurable computingProgrammable logic deviceAutomatic test equipmentEmbedded systemHardware_ARITHMETICANDLOGICSTRUCTURESbusinessField-programmable gate array
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Efficient pipeline FFT processors for WLAN MIMO-OFDM systems

2005

The most area-efficient pipeline FFT processors for WLAN MIMO-OFDM systems are presented. It is shown that although the R2/sup 3/SDF architecture is the most area-efficient approach for implementing pipeline FFT processors, RrMDC architectures are more efficient in MIMO-OFDM systems when more than three channels are used.

Engineeringbusiness.industryOrthogonal frequency-division multiplexingPipeline (computing)ComputerSystemsOrganization_COMPUTER-COMMUNICATIONNETWORKSFast Fourier transformData_CODINGANDINFORMATIONTHEORYIntegrated circuitMIMO-OFDMlaw.inventionlawEmbedded systemWireless lanCircuit architectureWi-FiHardware_ARITHMETICANDLOGICSTRUCTURESElectrical and Electronic EngineeringbusinessComputer hardwareElectronics Letters
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Quantum algorithms for formula evaluation

2010

We survey the recent sequence of algorithms for evaluating Boolean formulas consisting of NAND gates.

FOS: Computer and information sciencesQuantum PhysicsHardware_MEMORYSTRUCTURESFOS: Physical sciencesComputational Complexity (cs.CC)Computer Science::PerformanceComputer Science::Hardware ArchitectureComputer Science - Computational ComplexityComputer Science::Emerging TechnologiesComputer Science - Data Structures and AlgorithmsData Structures and Algorithms (cs.DS)Hardware_ARITHMETICANDLOGICSTRUCTURESQuantum Physics (quant-ph)Computer Science::Operating SystemsHardware_LOGICDESIGN
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Visualization2.mov

2019

movie representing the subtraction hologram derived from Eq. 3 in the paper

Hardware_ARITHMETICANDLOGICSTRUCTURESComputingMilieux_MISCELLANEOUSComputingMethodologies_COMPUTERGRAPHICS
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Visualization2.mov

2019

movie representing the subtraction hologram derived from Eq. 3 in the paper

Hardware_ARITHMETICANDLOGICSTRUCTURESComputingMilieux_MISCELLANEOUSComputingMethodologies_COMPUTERGRAPHICS
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Note about the concept of ‘Net Multipliers'

2002

International audience; Net multipliers, as introduced by Oosterhaven and Stelder (2002) accept outputs as entries instead of final demand. They are found by multiplying ordinary multipliers by the final demand ratio over the sector's output. This pragmatic solution suffers from ratio instability over time. The alternative net multipliers proposed here are based on the interpretation of the Leontief inverse matrix for the effects generated at each round. The new solution is not sensitive to the size of impacts. Now net multiplier is equal to the corresponding ordinary multiplier minus one, and the ordering of multipliers is unchanged.

JEL : C - Mathematical and Quantitative Methods/C.C6 - Mathematical Methods • Programming Models • Mathematical and Simulation Modeling/C.C6.C67 - Input–Output ModelsJEL: C - Mathematical and Quantitative Methods/C.C6 - Mathematical Methods • Programming Models • Mathematical and Simulation Modeling/C.C6.C67 - Input–Output ModelsJEL: D - Microeconomics/D.D5 - General Equilibrium and Disequilibrium/D.D5.D57 - Input–Output Tables and Analysis[SHS.ECO]Humanities and Social Sciences/Economics and Financeinput-output analysisdemand (economic theory)JEL: R - Urban Rural Regional Real Estate and Transportation Economics/R.R1 - General Regional Economics/R.R1.R15 - Econometric and Input–Output Models • Other ModelsJEL: O - Economic Development Innovation Technological Change and Growth/O.O2 - Development Planning and Policy/O.O2.O20 - GeneralJEL : D - Microeconomics/D.D5 - General Equilibrium and Disequilibrium/D.D5.D57 - Input–Output Tables and Analysis[ SHS.ECO ] Humanities and Social Sciences/Economies and finances<br />multiplier (economics)Hardware_ARITHMETICANDLOGICSTRUCTURES[SHS.ECO] Humanities and Social Sciences/Economics and FinanceJEL : R - Urban Rural Regional Real Estate and Transportation Economics/R.R1 - General Regional Economics/R.R1.R15 - Econometric and Input–Output Models • Other ModelsJEL : O - Economic Development Innovation Technological Change and Growth/O.O2 - Development Planning and Policy/O.O2.O20 - General
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Bridging the Gap between Advanced Distributed Teaching and the Use of Learning Management Systems in the University Context

2007

The selection of appropriate learning management system (LMS) is critical for supporting advanced distributed teaching. A survey was targeted for understanding the features that the LMS offer for university teachers and to find if the advanced features of the LMS were utilized, The findings imply that there is a gap between the LMS tools for advanced distributed teaching and their use in the university context. The teachers using LMS were also found to be heterogeneous by their computer skills and LMS uses.

Knowledge managementMultimediabusiness.industryComputer scienceInformationSystems_INFORMATIONSYSTEMSAPPLICATIONSUsabilityContext (language use)computer.software_genreBridging (programming)Computer literacyComputingMilieux_COMPUTERSANDEDUCATIONInformation systemLearning ManagementHardware_ARITHMETICANDLOGICSTRUCTURESbusinesscomputerContent managementSeventh IEEE International Conference on Advanced Learning Technologies (ICALT 2007)
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