Search results for "Control reconfiguration"
showing 10 items of 71 documents
Statechart-based design controllers for FPGA partial reconfiguration
2015
Statechart diagram and UML technique can be a vital part of early conceptual modeling. At the present time there is no much support in hardware design methodologies for reconfiguration features of reprogrammable devices. Authors try to bridge the gap between imprecise UML model and formal HDL description. The key concept in author's proposal is to describe the behavior of the digital controller by statechart diagrams and to map some parts of the behavior into reprogrammable logic by means of group of states which forms sequential automaton. The whole process is illustrated by the example with experimental results.
Fault Tolerant Routing Methodology for Mesh-of-Tree based Network-on-Chips using Local Reconfiguration
2018
Increase in the processing elements in a System-on- Chip (SoC) has led to an increasing complexity between the cores in the entire network. This communication bottleneck led to rise in the new paradigm called Network-on-Chip (NoC). These NoC are very much susceptible to various types of faults which can be transient, intermittent or permanent. This paper presents a fault-tolerant routing technique which can route the packets from a source to a destination in presence of permanent faults in the leaf routers of Mesh-of-Tree topology where cores are connected. This is achieved by using reconfiguration in the local ports of the leaf routers by inserting multiplexers as a layer between the leaf …
Architectural Implementation of a Reconfigurable NoC Design for Multi-Applications
2021
With the increasing number of applications running on a Network-on-Chip (NoC) based System-on-Chip (SoC), there is a need for designing a reconfigurable NoC platform to achieve acceptable performance for all the applications. This paper proposes a novel architecture for implementing a reconfiguration logic to the NoC platform executing multiple applications. The proposed architecture reconfigures SoC modules to the routers in the NoC with the help of tri-state buffers based on the applications running. The overhead in implementing the reconfiguration circuitry is significantly less, approximately 0.9% of the area and 1% of the total power consumed by the router network. The architectures pr…
Reconfiguration: a key to handle exceptions and performance deteriorations in manufacturing operations
2005
During a manufacturing operation, exceptions may occur dynamically and unpredictably. Their occurrence may lead to the degradation of system performance or, in the worst case scenario may interrupt the production process by causing errors in the schedule plan. This paper classifies three families of exceptions: (1) out-of-order events such as machine breakdowns, (2) operational out-of-ordinary events such as rush orders and (3) deteriorations of manufacturing resource performance such as reductions of machines' utilization. In all cases, in order to maintain an adequate level of system performance, it is necessary to detect exceptions, to diagnose them quickly and to recover them by taking …
Fast solution of radial distribution networks with automated compensation and reconfiguration
2000
Abstract Optimal operation of radial distribution networks with automated compensation and reconfiguration requires the solution of a combinatorial optimisation problem, since the variables are the on/off status of capacitor banks and the open/close status of tie-switches. The solution approaches recently proposed use iterative algorithms such as genetic algorithms, simulated annealing and tabu search, for which the network needs to be solved in different configurations and at different compensation levels. The aim of this evaluation is that of attributing a quality index to each solution so that all the solutions can be suitably ordered. In an automated network, any configuration can be ob…
A Fuzzy Adaptive Controller for an Ambient Intelligence Scenario
2014
The definition of effective energy saving strategies capable of satisfying users’ requirements for environmental wellness is a complex task that requires the definition of well-tuned optimization algorithms. Sensory information depends on the environments observed, hence the model adopted to describe it should be adaptive and dynamic. This chapter presents a methodology for the tuning of a fuzzy controller capable of minimizing energy consumption while maximizing the users comfort in an Ambient Intelligence Scenario. A meta-heuristic search algorithm produces different sets of fuzzy rules depending on the needs of the system. An ontology has been developed to describe the configurations of …
A Middleware to Develop and Test Vehicular Sensor Network Applications
2019
The Smart city ecosystem is composed of several networked devices that provide services to citizens and improve their quality of life. Basic services, which must be exposed by the underlying software infrastructure, require efficient networking and communication protocols to coordinate and manage all the system components. In particular, Vehicular Sensor Networks (VSNs) are envisioned as key components of smart cities. Verification is crucial in such a highly dynamic scenario to ensure operation correctness and to reduce the development cost of smart applications. However, the rigidity of existing middlewares makes development, reconfiguration, and testing rather difficult. In this work, we…
Implementation of JPEG2000 arithmetic decoder using dynamic reconfiguration of FPGA
2005
This paper describes implementation of a part of JPEG2000 algorithm (MQ-Decoder and arithmetic decoder) on a FPGA board using dynamic reconfiguration. Comparison between static and dynamic reconfiguration is presented and new analysis criteria (time performance, logic cost, spatio-temporal efficiency) are defined. MQ-decoder and arithmetic decoder can be classified in the most attractive case for dynamic reconfiguration implementation: applications without parallelism by functions. This implementation is done on an architecture designed to study dynamic reconfiguration of FPGAs: the ARDOISE architecture. The implementation obtained, based on four partial configurations of arithmetic decoder…
Cost comparison of image rotation implantations on static and dynamic Reconfigurable FPGAs
2002
FPGA components are widely used today to perform various algorithms (digital filtering) in real time. The emergence of Dynamically Reconfigurable (DR) FPGAs made it possible to reduce the number of necessary resources to carry out an image processing application (tasks chain). We present in this article an image processing application (image rotation) that exploits the FPGA 's dynamic reconfiguration feature. A comparison is undertaken between the dynamic and static reconfiguration by using two criteria, cost and performance criteria. For the sake of testing the validity of our approach in terms of Algorithm and Architecture Adequacy, we realized an AT40K40 based board ARDOISE.
Comprehensive Modeling and Experimental Testing of Fault Detection and Management of a Nonredundant Fault-Tolerant VSI
2015
This paper presents an investigation and a comprehensive analysis on fault operations in a conventional three-phase voltage source inverter. After an introductory section dealing with power converter reliability and fault analysis issues in power electronics, a generalized switching function accounting for both healthy and faulty conditions and an easy and feasible method to embed fault diagnosis and reconfiguration within the control algorithm are introduced. The proposed system has simple and compact implementation. Experimental results operating both at open- and closed-loop current control, obtained using a test bench realized using a dSPACE system and the fault-tolerant inverter protot…