Search results for "Hardware architecture"
showing 10 items of 120 documents
GAPPCO: An Easy to Configure Geometric Algebra Coprocessor Based on GAPP Programs
2017
Because of the high numeric complexity of Geometric Algebra, its use in engineering applications relies heavily on tools and devices for efficient implementations. In this article, we present a novel hardware design for a Geometric Algebra coprocessor, called GAPPCO, which is based on Geometric Algebra Parallelism Programs (GAPP). GAPPCO is a design for a coprocessor combining the advantages of optimizing software with a configurable hardware able to implement arbitrary Geometric Algebra algorithms. The idea is to have a fixed hardware easily and fast to be configured for different algorithms. We describe the new hardware design together with the complete tool chain for its configuration.
Hardware and Software Platforms for Distributed Computing on Resource Constrained Devices
2014
The basic idea of distributed computing is that it is possible to solve a large problem by using the resources of various computing devices connected in a network. Each device interacts with each other in order to process a part of a problem, contributing to the achievement of a global solution. Wireless sensor networks (WSNs) are an example of distributed computing on low resources devices. WSNs encountered a considerable success in many application areas. Due to the constraints related to the small sensor nodes capabilities, distributed computing in WSNs allows to perform complex tasks in a collaborative way, reducing power consumption and increasing battery life. Many hardware platforms …
Design and Validation of a FPGA-Based HIL Simulator for Minimum Losses Control of a PMSM
2021
This work examines the FPGA programmable logic platforms applied to minimum losses control of a Permanent Magnet Synchronous Motor (PMSM), which represents a flexible solution for the implementation of an advanced digital control algorithm, given their intrinsic parallel structure and the capability to be directly reprogrammable in the field. In particular, design and validation of a FPGA-based Hardware-In-the-Loop (HIL) simulator is proposed, by investigating about data format, quantization and discretization effects and other issues arising during the experimental validation of a controller prototype, in order to reduce the embedded software development cycle and test control systems. The…
Importance of the Window Function Choice for the Predictive Modelling of Memristors
2021
Window functions are widely employed in memristor models to restrict the changes of the internal state variables to specified intervals. Here, we show that the actual choice of window function is of significant importance for the predictive modelling of memristors. Using a recently formulated theory of memristor attractors, we demonstrate that whether stable fixed points exist depends on the type of window function used in the model. Our main findings are formulated in terms of two memristor attractor theorems, which apply to broad classes of memristor models. As an example of our findings, we predict the existence of stable fixed points in Biolek window function memristors and their absenc…
Selfish vs. Unselfish Optimization of Network Creation
2005
We investigate several variants of a network creation model: a group of agents builds up a network between them while trying to keep the costs of this network small. The cost function consists of two addends, namely (i) a constant amount for each edge an agent buys and (ii) the minimum number of hops it takes sending messages to other agents. Despite the simplicity of this model, various complex network structures emerge depending on the weight between the two addends of the cost function and on the selfish or unselfish behaviour of the agents.
A New Approach to the Modeling of Anisotropic Media with the Transmission Line Matrix Method
2021
A reformulation of the Transmission Line Matrix (TLM) method is presented to model non-dispersive anisotropic media. Two TLM-based solutions to solve this problem can already be found in the literature, each one with an interesting feature. One can be considered a more conceptual approach, close to the TLM fundamentals, which identifies each TLM in Maxwell’s equations with a specific line. But this simplicity is achieved at the expense of an increase in the memory storage requirements of a general situation. The second existing solution is a more powerful and general formulation that avoids this increase in memory storage. However, it is based on signal processing techniques and considerabl…
Layout influence on microwave performance of graphene field effect transistors
2018
The authors report on an in-depth statistical and parametrical investigation on the microwave performance of graphene FETs on sapphire substrate. The devices differ for the gate-drain/source distance and for the gate length, having kept instead the gate width constant. Microwave S -parameters have been measured for the different devices. Their results demonstrate that the cut-off frequency does not monotonically increase with the scaling of the device geometry and that it exists an optimal region in the gate-drain/source and gate-length space which maximises the microwave performance.
Terahertz electrical writing speed in an antiferromagnetic memory
2018
The speed of writing of state-of-the-art ferromagnetic memories is physically limited by an intrinsic gigahertz threshold. Recently, realization of memory devices based on antiferromagnets, in which spin directions periodically alternate from one atomic lattice site to the next has moved research in an alternative direction. We experimentally demonstrate at room temperature that the speed of reversible electrical writing in a memory device can be scaled up to terahertz using an antiferromagnet. A current-induced spin-torque mechanism is responsible for the switching in our memory devices throughout the 12-order-of-magnitude range of writing speeds from hertz to terahertz. Our work opens the…
Supervised learning of time-independent Hamiltonians for gate design
2018
We present a general framework to tackle the problem of finding time-independent dynamics generating target unitary evolutions. We show that this problem is equivalently stated as a set of conditions over the spectrum of the time-independent gate generator, thus transforming the task to an inverse eigenvalue problem. We illustrate our methodology by identifying suitable time-independent generators implementing Toffoli and Fredkin gates without the need for ancillae or effective evolutions. We show how the same conditions can be used to solve the problem numerically, via supervised learning techniques. In turn, this allows us to solve problems that are not amenable, in general, to direct ana…
A Compact SPICE Model for Organic TFTs and Applications to Logic Circuit Design
2016
This work introduces a compact DC model developed for organic thin film transistors (OTFTs) and its SPICE implementation. The model relies on a modified version of the gradual channel approximation that takes into account the contact effects, occurring at nonohmic metal/organic semiconductor junctions, modeling them as reverse biased Schottky diodes. The model also comprises channel length modulation and scalability of drain current with respect to channel length. To show the suitability of the model, we used it to design an inverter and a ring oscillator circuit. Furthermore, an experimental validation of the OTFTs has been done at the level of the single device as well as with a discrete-…