Search results for "Hardware_PERFORMANCEANDRELIABILITY"
showing 10 items of 91 documents
Control of solid-state fault current limiter for DG-integrated distribution systems
2017
Fault current limier (FCL) is a device that limits the system current under fault conditions without disconnecting the system and affecting the power system protection components such as circuit breakers. Many types of FCLs have been proposed to limit the magnitude of the fault current. Solid-state fault current limiters (SSFCLs) can limit the peak value of the fault current by applying several methods, such as controlling the system impedance or controlling the voltage that appears across the fault. In this paper, a new control scheme for the SSFCL circuit is presented. The control method is based on controlling the duty cycle of solid state switches to control the rms value of the system …
Current and Voltage Behaviour During a Fault in a HV/MV System: Methods and Measurements
2015
When a single line to ground fault happens on the MV side of a HV/MV system, only a small portion of the fault current is injected into the ground by the ground-grid of the faulty substation. In fact the fault current is distributed between grounding electrodes and MV cables sheaths. In systems with isolated neutral or with resonant earthing this may be sufficient to provide safety from electric shock. Experimental measurements were performed on a real MV distribution network: a real single line to ground fault was made and fault currents were measured in the faulty substation and in four neighbouring substations. In this paper the problem of fault current distribution is introduced, the te…
A Technique for Power Supply Harmonic Impedance Estimation Using a Controlled Voltage Disturbance
2002
A method for power system impedance estimation is presented. The method employs a power converter to inject a voltage transient onto the supply system. As the technique employs controlled power electronic devices it may be used as a stand alone piece of a portable measurement equipment, or it may be embedded into the functions of an active shunt filter for improved harmonic control. The impedance is estimated through correlation of the measured voltage and current transients. Simulations and experimental results demonstrate the measurement technique is highly accurate and effective.
Sparsity-Driven Digital Terrain Model Extraction
2020
We here introduce an automatic Digital Terrain Model (DTM) extraction method. The proposed sparsity-driven DTM extractor (SD-DTM) takes a high-resolution Digital Surface Model (DSM) as an input and constructs a high-resolution DTM using the variational framework. To obtain an accurate DTM, an iterative approach is proposed for the minimization of the target variational cost function. Accuracy of the SD-DTM is shown in a real-world DSM data set. We show the efficiency and effectiveness of the approach both visually and quantitatively via residual plots in illustrative terrain types.
Metastable memristive lines for signal transmission and information processing applications
2016
Traditional studies of memristive devices have mainly focused on their applications in nonvolatile information storage and information processing. Here, we demonstrate that the third fundamental component of information technologies-the transfer of information-can also be employed with memristive devices. For this purpose, we introduce a metastable memristive circuit. Combining metastable memristive circuits into a line, one obtains an architecture capable of transferring a signal edge from one space location to another. We emphasize that the suggested metastable memristive lines employ only resistive circuit components. Moreover, their networks (for example, Y-connected lines) have an info…
Giant Magnetoresistance (GMR) sensors for 0.35µm CMOS technology sub-mA current sensing
2014
This paper reports on the design and fabrication of microelectronic structures for non-invasive indirect electric current sensing at the IC level. A 0.35 ?m CMOS ASIC has been specifically developed for this purpose. Then, a low temperature post-process, fully compatible with the CMOS technology, has been applied for depositing Giant Magnetoresistive (GMR) sensors. Preliminary experimental results for obtaining the sensitivity of the devices are presented. The detection limit is estimated to be about 5 ?A.
Correction: The genomic and clinical landscape of fetal akinesia
2020
Abstract An amendment to this paper has been published and can be accessed via a link at the top of the paper.
Generation of nonlinear current-voltage characteristics. A general method
2002
International audience; A general method allowing to construct nonlinear resistors with arbitrary current-voltage (I-V) characteristics is proposed. The example of a cubic I-V characteristic is presented showing a perfect agreement between the theoretical desired resistor and its electronic realization based on analog multipliers.
Estimation of power supply harmonic impedance using a controlled voltage disturbance
2002
A novel method for power system impedance estimation is presented. The method employs a power converter to inject a voltage transient onto the supply system. The impedance is estimated through correlation of the measured voltage and current transients. Simulations and experimental results demonstrate the effectiveness of this measurement technique.
Progress towards innovative and energy efficient logic circuits
2020
Abstract The integration of superconductive nanowire logic memories and energy efficient computing Josephson logic is explored. Nanowire memories are based on the integration of switchable superconducting nanowires with a suitable magnetic material. These memories exploit the electro-thermal operation of the nanowires to efficiently store and read a magnetic state. In order to achieve proper memory operation a careful design of the nanowire assembly is necessary, as well as a proper choice of the magnetic material to be employed. At present several new superconducting logic families have been proposed, all tending to minimize the effect of losses in the digital Josephson circuits replacing …