Search results for "circuit"
showing 10 items of 936 documents
Role of photoactive layer morphology in high fill factor all-polymer bulk heterojunction solar cells
2011
We report on the realization of all-polymer solar cells based on blends of poly(3-hexylthiophene-2,5-diyl) (P3HT) as a donor and poly{[N,N'-bis(2-octyldodecyl)-naphthalene-1,4,5,8-bis(dicarboximide)-2,6-diyl]-alt-5,5'-(2,2'-bithiophene)} (P(NDI2OD-T2)) as an acceptor. High fill factors are demonstrated for the first time in this class of devices suggesting high dissociation efficiency for the bounded electron-hole pairs and balanced electron and hole mobility along the thin films. The use of the high-mobility n-type P(NDI2OD-T2) polymer enables us to overcome one of the problems limiting the efficiency of all-polymer solar cells, resulting in fill factors comparable with those reported for …
Excel Table with differentially expressed genes parasite success and attack from Ant behaviour and brain gene expression of defending hosts depend on…
2019
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GLOBAL DELAY TIME FOR GENERAL DISTRIBUTED NETWORKS WITH APPLICATIONS TO TIMING ANALYSIS OF DIGITAL MOS INTEGRATED CIRCUITS
1989
We consider here a general nerwork composed by n‐distributed parameters lines (with telegraph‐equations models) and m‐capacitors, all connected by a resistive multiport. An asymptotic stability property drives us to define and evaluate a global parameter (“λ‐delay time”) which describes the speed of signals propagation through the network. Because of its simplicity of calculation and its tightness, the given upper bound of the λ‐delay time is useful in timing analysis of MOS integrated chips.
Conceptual design of the TRACE detector readout using a compact, dead time-less analog memory ASIC
2015
[EN] The new TRacking Array for light Charged particle Ejectiles (TRACE) detector system requires monitorization and sampling of all pulses in a large number of channels with very strict space and power consumption restrictions for the front-end electronics and cabling. Its readout system is to be based on analog memory ASICs with 64 channels each that sample a View the MathML source window of the waveform of any valid pulses at 200 MHz while discarding any other signals and are read out at 50 MHz with external ADC digitization. For this purpose, a new, compact analog memory architecture is described that allows pulse capture with zero dead time in any channel while vastly reducing the tota…
Mixed-type circuits with distributed and lumped parameters as correct models for integrated structures
1991
The technology of integrated circuits imposes upon their designers the need to deal with structures with distributed parameters. Figure 4.1 shows a schematic diagram of part of a digital integrated chip, consisting of an n MOS transistor with gate (G), drain (D) and source (S) as terminals, and its thin-film connection with the rest of the chip. This on-chip connection can be made by metals (Al, W), polycristaline silicon (polysilicon) or metal suicides (WSi 2 ). Alternative materials to oxide-passivated silicon substrates are saphire and gallium arsenide (Saraswat and Mohammadi [1982], Yuan et al. [1982], Passlack et al. [1990]).
The ATLAS Level-1 Calorimeter Trigger
2008
The ATLAS Level-1 Calorimeter Trigger uses reduced-granularity information from all the ATLAS calorimeters to search for high transverse-energy electrons, photons, tau leptons and jets, as well as high missing and total transverse energy. The calorimeter trigger electronics has a fixed latency of about 1 microsecond, using programmable custom-built digital electronics. This paper describes the Calorimeter Trigger hardware, as installed in the ATLAS electronics cavern.
Well-posed nonlinear problems in integrated circuits modeling
1991
In this paper we study the problem (E) + (BC) + (IC) (see below) which represents a model for integrated circuits. We assume that the distributed parametersr(x) andc(x) are nonconstant, dielectric leakages depend on thex-coordinate as well as the voltage level, while the interconnecting multiport is nonlinear and possibly multivalued.
ℓp-solutions of countable infinite systems of equations and applications to electrical circuits
1991
In the preceding chapter we have studied a lumped parameter model of a class of circuits containing a finite number of elements. Here we are interested in qualitative properties of the network in Figure 3.1.
On positive P
2002
Continuing a line of research opened up by Grigni and Sipser (1992) and further pursued by Stewart (1994), we show that a wide variety of equivalent characterizations of P still remain equivalent when restricted to be positive. All these restrictions thus define the same class posP, a proper subclass of monP, the class of monotone problems in P. We also exhibit complete problems for posP under very weak reductions.
First-order expressibility of languages with neutral letters or: The Crane Beach conjecture
2005
A language L over an alphabet A is said to have a neutral letter if there is a letter [email protected]?A such that inserting or deleting e's from any word in A^* does not change its membership or non-membership in L. The presence of a neutral letter affects the definability of a language in first-order logic. It was conjectured that it renders all numerical predicates apart from the order predicate useless, i.e., that if a language L with a neutral letter is not definable in first-order logic with linear order, then it is not definable in first-order logic with any set N of numerical predicates. Named after the location of its first, flawed, proof this conjecture is called the Crane Beach …