6533b7dcfe1ef96bd1271e86

RESEARCH PRODUCT

Improvement of the P/E window in nanocrystal memories by the use of high-k materials in the control dielectric

Ester SpitaleD. CorsoCosimo GerardiSalvatore LombardoIsodiana Crupi

subject

PermittivityMaterials scienceCondensed matter physicsbusiness.industryElectrical engineeringDielectricCondensed Matter PhysicsThermal conductionSettore ING-INF/01 - ElettronicaAtomic and Molecular Physics and OpticsBand offsetSurfaces Coatings and FilmsElectronic Optical and Magnetic MaterialsNanocrystalControl and Systems EngineeringElectrical and Electronic EngineeringSafety Risk Reliability and QualitybusinessSaturation (magnetic)High-κ dielectricVoltage

description

Abstract In this paper nanocrystals memories program curves are shown and their saturation points (steady state condition) can be observed. We present a model that relates the voltage shift at the steady state ( Δ V T ss ) to the gate program voltage (VG). Starting from a good agreement between experimental data and simulations for nanocrystals memory cells with a conventional dielectric structure (SiO2), we present the estimated values of the Δ V T ss vs VG for different control stacks. Our investigation shows an improvement if a material with a high dielectric constant and a small conduction band-offset with respect to the SiO2, is placed between two SiO2 layers when the first of them is very thin.

10.1016/j.microrel.2004.11.029https://publications.cnr.it/doc/35656