Search results for "Computer Science::Hardware Architecture"
showing 10 items of 67 documents
Quantum algorithms for formula evaluation
2010
We survey the recent sequence of algorithms for evaluating Boolean formulas consisting of NAND gates.
Reverse and normal drag along a fault
2005
An analysis of the theoretical displacement field around a single dip-slip fault at depth reveals that normal and reverse fault drag develop by perturbation flow induced by fault slip. We analytically model the heterogeneous part of the instantaneous displacement field of an isolated two-dimensional mode II fault in an infinite, homogeneous elastic body in response to fault slip. Material on both sides of the fault is displaced and ‘opposing circulation cells’ arise on opposite sides of the fault, with displacement magnitudes increasing towards the center of the fault. Both normal and reverse drag can develop at the fault center depending on the angle between the markers and the fault; norm…
The influence of the propagation path length on the results of the time–frequency analysis of the acoustic emission generated by partial discharges i…
2006
The paper presents the measurement results of the acoustic emission (AE) signals generated by partial discharges (PDs) at various thickness of the oil insulation layer. For the AE signals registered the time - frequency analysis was carried out based on the use of the short-time Fourier transform (STFT). Two- and three-dimensional spectrograms of the power spectrum density and the amplitude spectrum were determined. The evaluation of the influence of the propagation path length of the AE signal on the results of the time - frequency analysis was performed through the analysis of the spectrograms determined.
A Specialized Architecture for Color Image Edge Detection Based on Clifford Algebra
2013
Edge detection of color images is usually performed by applying the traditional techniques for gray-scale images to the three color channels separately. However, human visual perception does not differentiate colors and processes the image as a whole. Recently, new methods have been proposed that treat RGB color triples as vectors and color images as vector fields. In these approaches, edge detection is obtained extending the classical pattern matching and convolution techniques to vector fields. This paper proposes a hardware implementation of an edge detection method for color images that exploits the definition of geometric product of vectors given in the Clifford algebra framework to ex…
An FPGA based Topological Processor Prototype for the ATLAS Level-1 Trigger Upgrade
2012
By 2014 the LHC will collide proton bunches at 14TeV with an increased instantaneous luminosity up to 3·10³⁴cm⁻²s⁻¹. The resulting higher event rate will challenge the existing ATLAS trigger system. A reduction on the trigger rate can be achieved by selecting interesting channels based on their expected decay topology and thus reducing background. This will be achieved by introducing of a new FPGA based module in the Level-1 trigger: the Topological Processor L1Topo. With L1Topo it will be possible for the first time to concentrate detailed information from the entire calorimeters and the muon detector into a single module. L1Topo will receive a total aggregate bandwidth of 1Tb/s. The data …
FPGA Implementation Of Diffusive Realization For A Distributed Control Operator
2010
International audience; We focus on the question of real-time computation for optimal distributed filtering or control applicable to MEMS Arrays. We present an algorithm for the realization of a linear operator solution to a functional equation through its application to a Lyapunov operatorial equation associated to the heat equation in one dimension. It is based on the diffusive realization, and turns to be well suited for fined grained parallel computer architecture as Field Programmable Gate Arrays (FPGA). An effective FPGA implementation has been successfully carried out. Here, we report the main implementation steps and the final measured performances.
Lumped parameter approach of nonlinear networks with transistors
1991
In this chapter we study the lumped parameter modelling of a large class of circuits composed of bipolar transistors, junction diodes and passive elements (resistors, capacitors, inductors). All these elements are nonlinear: the semiconductor components are modelled by “large signal” equivalent schemes, the capacitors and inductors have monotone characteristics while the resistors can be included in a multiport which also has a monotone description.
Advanced time-stamped total data acquisition control front-end for MeV ion beam microscopy and proton beam writing
2013
Many ion-matter interactions exhibit [email protected] time dependences such as, fluorophore emission quenching and ion beam induced charge (IBIC). Conventional event-mode MeV ion microbeam data acquisition systems discard the time information. Here we describe a fast time-stamping data acquisition front-end based on the concurrent processing capabilities of a Field Programmable Gate Array (FPGA). The system is intended for MeV ion microscopy and MeV ion beam lithography. The speed of the system (>240,000 events s^-^1 for four analogue to digital converters (ADC)) is limited by the ADC throughput and data handling speed of the host computer.
Chip-to-chip plasmonic interconnects and the activities of EU project NAVOLCHI
2012
In this paper, the chip-to-chip interconnection architecture adopted by the EU-project NAVOLCHI are discussed. The plasmonic physical layer consisting of a plasmonic nanoscale laser, a modulator, an amplifier and a detector is introduced. Current statuses of the plasmonic devices are reviewed.
Surface plasmon circuitry in opto-electronics
2012
This tutorial reviews the physics of surface plasmon circuitry in order to bring to the fore recently demonstrated applications of surface plasmon in optoelectronics such as on-board optical interconnects or routing in datacom networks.