Search results for "Field-programmable gate array"
showing 10 items of 175 documents
An FPGA-Based Software Defined Radio Platform for the 2.4GHz ISM Band
2006
A prototype of a Software Defined Radio (SDR) platform has been successfully designed and tested implementing a reconfigurable IEEE 802.11 and ZigBee receiver. The system exploits the reconfiguration capability of an FPGA for implementing a number of receiver configurations that share the same RF front-end. Configurations can be switched at run time, or can share the available logic and radio resource.
Heavy ion SEE test of 2 Gbit DDR3 SDRAM
2011
New generation 2 Gbit DDR3 SDRAMs from Micron, Samsung and Nanya have been tested under heavy ions. SEFIs significantly outweigh random SEU errors even at low LET; however, SEFIs can be mitigated by frequent re-initialization.
<title>Architecture for real-time wood inspection</title>
2000
This study has been realized to improve industrial machines that allow to analyze planks by detecting their width and too important defects thanks to a computer vision system. These machines are currently piloted by software with the help of PCs. The aim of our work is to realize a hardware card to increase the processing speed.
Compact instrumentation for radiation tolerance test of flash memories in space environment
2010
Aim of this work is the description of a test equipment, designed to be integrated on board of a microsatellite, able to investigate the radiation tolerance of non-volatile memory arrays in a real flight experiment. An FPGA-based design was adopted to preserve a high flexibility degree. Besides standard Program/Read/Erase functions, additional features such as failure data screening and latch-up protection have been implemented. The instrument development phase generated, as a by-product, a non-rad-hard version of the instrument that allowed performing in-situ experiments using 60Co and 10 MeV Boron irradiation facilities on Ground. Preliminary measurement results are reported to show the i…
Design and testing of the high speed signal densely populated ATLAS calorimeter trigger board dedicate to jet identification
2017
Abstract—The ATLAS experiment has planned a major upgrade in view of the enhanced luminosity of the beam delivered by the Large Hadron Collider (LHC) in 2021. As part of this, the trigger at Level-1 based on calorimeter data will be upgraded to exploit fine-granularity readout using a new system of Feature Extractors (three in total), which each uses different physics objects for the trigger selection. The contribution focusses on the jet Feature EXtractor (jFEX) prototype. Up to a data volume of 2 TB/s has to be processed to provide jet identification (including large area jets) and measurements of global variables within few hundred nanoseconds latency budget. Such requirements translate …
Reconfigurable digital instrumentation based on FPGA
2004
A novel application of FPGA to realize digital test equipment is proposed. It takes advantage of the dynamic reconfigurability of FPGAs so easily tailoring custom test functions in the same instrument. This results in high effective, compact and low cost instruments.
Development of an optical link card for the upgrade phase II of TileCal experiment
2010
This work presents the design of an optical link card developed in the frame of the R&D activities for the phase 2 upgrade of the TileCal experiment as part of the evaluation of different technologies for the final choice in the next two years. The board is designed as a mezzanine which can work independently or plugged in the Optical Multiplexer Board of the TileCal backend electronics. It includes two SNAP 12 optical connectors able to transmit and receive up to 75 Gbps and one SFP optical connector for lower speeds and compatibility with existing hardware as the Read Out Driver. All processing is done in a Stratix II GX FPGA. Details are given on the hardware design including signal and …
Hardware implementation of a robust adaptive filter: Two approaches based in High-Level Synthesis design tools
2009
Abstract Adaptive filters are used in a wide range of applications. Impulsive noise affects the proper operation of the filter and the adaptation process. This noise is one of the most damaging types of signal distortion, not always considered when implementing algorithms. Field Programmable Gate Array (FPGA) are widely used for applications where timing requirements are strict. Nowadays, two main design processes can be followed, namely, Hardware Description Language (HDL) and a High Level Synthesis (HLS) design tool for embedded system design. This paper describes the FPGA implementation of an adaptive filter robust to impulsive noise using two approaches based in HLS and the implementati…
FPGA implementation of a fuel cell emulator
2010
Fuel cell based systems are usually tested with the aid of high-cost and complex auxiliary devices. A fuel cell emulator is an attractive solution for preliminary downward system test. The emulator replaces the effective power source saving cost, volume and hydrogen reserve still ensuring high-accuracy of test results. The use of a highperformance fuel cell model is essential for a successful conclusion of the overall design process. Although the proposed emulator is suitable for each fuel cell type and power level, a 10W Proton Exchange Membrane Fuel Cell emulator is designed and tested. An FPGA based controller models the fuel cell steady-state and dynamic behaviour, including temperature…
Fully digital FPGA-based Front-End Electronics for the GALILEO array
2014
In this work we present the fully digital Front End Electronics (FEE) read out system developed for the GALILEO array. The system, developed in collaboration with the Advanced Gamma Tracking Array (AGATA) collaboration, is composed of three main blocks: preamplifiers, digitizers and preprocessing electronics. The slow control system contains a custom Linux driver, a dynamic library and a server implementing network services. The digital processing of the data from the GALILEO germanium detectors has demonstrated the capability to achieve an energy resolution of 1.53‰ at an energy of 1.33 MeV.