Search results for "Network on"
showing 10 items of 38 documents
How can a learning network support organisational development?
2010
The purpose of this study is to examine the development processes within a network project, The Learning Network of Knowledge Management. The study focuses on the impact of the network on two participating companies. The following research questions were addressed: (a) how did participation in a learning network support professional development of individuals; (b) how did it advance clarifying the mission, collaboration and work roles of teams; (c) how did organisational practices and processes develop as a result of the network project? The data were collected with interviews. The findings showed that the starting points, processes and results differed in two organisations. Both companies …
Developing Domain-Knowledge Evolutionary Algorithms for Network-on-Chip Application Mapping
2013
This paper addresses the Network-on-Chip (NoC) application mapping problem. This is an NP-hard problem that deals with the optimal topological placement of Intellectual Property cores onto the NoC tiles. Network-on-Chip application mapping Evolutionary Algorithms are developed, evaluated and optimized for minimizing the NoC communication energy. Two crossover and one mutation operators are proposed. It is analyzed how each optimization algorithm performs with every genetic operator, in terms of solution quality and convergence speed. Our proposed operators are compared with state-of-the-art genetic operators for permutation problems. Finally, the problem is approached in a multi-objective w…
A multi-objective strategy for concurrent mapping and routing in networks on chip
2009
The design flow of network-on-chip (NoCs) include several key issues. Among other parameters, the decision of where cores have to be topologically mapped and also the routing algorithm represent two highly correlated design problems that must be carefully solved for any given application in order to optimize several different performance metrics. The strong correlation between the different parameters often makes that the optimization of a given performance metric has a negative effect on a different performance metric. In this paper we propose a new strategy that simultaneously refines the mapping and the routing function to determine the Pareto optimal configurations which optimize averag…
On the potential of NoC virtualization for multicore chips
2008
As the end of Moores-law is on the horizon, power becomes a limiting factor to continuous increases in performance gains for single-core processors. Processor engineers have shifted to the multicore paradigm and many-core processors are a reality. Within the context of these multi-core chips, three key metrics point themselves out as being of major importance, performance, fault-tolerance (including yield), and power consumption. A solution that optimizes all three of these metrics is challenging. As the number of cores increases the importance of the interconnection network-on-chip (NoC) grows as well, and chip designers should aim to optimize these three key metrics in the NoC context as …
Report of the IVth Workshop of the Spanish National Network on Mycotoxins and Toxigenic Fungi and Their Decontamination Processes (MICOFOOD), Held in…
2019
Ensiling is a practice commonly employed worldwide to preserve different kinds of crops for long periods of storage with similar nutritional values to the fresh materials. Since silages are one of the major components of the ruminant diet, these materials represent a potential source of mycotoxins as a consequence of the growth of filamentous fungi. The aim of this study was to analyse the presence of aflatoxins and Fusarium mycotoxins in different types of silages (maize, grass, alfalfa, sugar beet pulp, immature corn and ryegrass) collected in dairy farms located in four Spanish regions. Fungal populations, lactic acid bacteria, pH and water activity of the samples were also evaluated. Pe…
Fault-Tolerant Application Mapping on to ZMesh topology based Network-on-Chip Design
2020
This paper proposes Particle Swarm Optimization (PSO) based fault-tolerant application mapping on to ZMesh topology based Network-on-Chip (NoC) design. Permanent faults in application cores has been considered and performed application mapping using PSO. The major contribution of this paper is to find out the best position for the spare core to be placed in the network using PSO. Experimentations have been carried out by scaling the ZMesh network size and percentage of network faults. The results show that the proposed approach leads to minimum overhead in communication cost over fault-free result.
Wireless versus Wired Network-on-Chip to Enable the Multi- Tenant Multi-FPGAs in Cloud
2021
The new era of computing is not CPU-centric but enriched with all the heterogeneous computing resources including the reconfigurable fabric. In multi-FPGA architecture, either deployed within a data center or as a standalone model, inter-FPGA communication is crucial. Network-on-chip exhibits a promising performance for the integration of one FPGA. A sustainable communication architecture requires stable performance as the number of applications or users grows. Wireless network-on-chip has the potential to be that communication architecture, as it boasts the same performance capability as wired solutions in addition to its multicast capacities. We conducted an exploratory study to investiga…
Demonstration of background rejection using deep convolutional neural networks in the NEXT experiment
2021
[EN] Convolutional neural networks (CNNs) are widely used state-of-the-art computer vision tools that are becoming increasingly popular in high-energy physics. In this paper, we attempt to understand the potential of CNNs for event classification in the NEXT experiment, which will search for neutrinoless double-beta decay in Xe-136. To do so, we demonstrate the usage of CNNs for the identification of electron-positron pair production events, which exhibit a topology similar to that of a neutrinoless double-beta decay event. These events were produced in the NEXT-White high-pressure xenon TPC using 2.6 MeV gamma rays from a Th-228 calibration source. We train a network on Monte Carlo-simulat…
An immunoassay for terbutryn using direct hapten linkage to a glutaraldehyde network on the polystyrene surface of standard microtiter plates.
2001
2-Aminobutylamino-4-ethylamino-6-isopropylamino-1,3,5-triazine (ABA-atrazine) has been synthesized and used as a coating hapten in an immunoassay with a monoclonal antibody against terbutryn. Coating was achieved by covalently linking ABA-atrazine to a glutaraldehyde polymer network directly bound to the polystyrene surface of a standard 96-well microtiter plate. The assay was carefully optimized. In particular, the coating hapten concentration had a strong effect on the ELISA sensitivity. By including a pre-incubation step a low test midpoint (IC50-value) of 0.130 microg L(-1) was achieved. As far as we are aware this is the most sensitive ELISA for terbutryn yet reported. The coating-hapt…