Search results for "Hardware_LOGICDESIGN"
showing 10 items of 50 documents
A Methodology for the Design of MOS Current-Mode Logic Circuits
2010
In this paper, a design methodology for the minimization of various performance metrics of MOS Current-Mode Logic (MCML) circuits is described. In particular, it allows to minimize the delay under a given power consumption, the power consumption under a given delay and the power-delay product. Design solutions can be evaluated graphically or by simple and effective automatic procedures implemented within the MATLAB environment. The methodology exploits the novel concepts of crossing-point current and crossing-point capacitance. A useful feature of it is that it provides the designer with useful insights into the dependence of the performance metrics on design variables and fan-out capacitan…
Optimum design of two-level MCML gates
2008
In this paper, we address the problem of the optimum design of two-level MOS Current Mode Logic (MCML) gates. In particular, we describe a design methodology based on the concept of crossing-point current already introduced for the optimum design of single-level MCML gates. This methodology is suited both for automated implementation and graphic estimate of the optimum design. Moreover, it clearly shows how some important design parameters affect the optimum values of delay and power consumption. Several gates were designed in an IBM 130 nm CMOS technology. The results of SPICE simulations, reported here, demonstrate the effectiveness of the proposed design methodology.
Higher PV Module Efficiency by a Novel CBS Bypass
2011
There is an increasing focus on reducing costs and improving efficiency for photovoltaic (PV) cells and modules as well as finding a more efficient approach to the product manufacturing. This letter introduces an innovative solution to bypass shaded PV cells instead of a traditional Schottky diode, in order to avoid overheating of cells in the case of partial shading. The goal is to reduce the power dissipation and improve the general efficiency of a PV generator. A novel device called cool bypass switch is then presented. It is made up of a Power MOS driven by a controller with the task to charge a storage capacitor. Tests and comparisons with standard Schottky diodes are then performed an…
Reordering Method and Hierarchies for Quantum and Classical Ordered Binary Decision Diagrams
2017
We consider Quantum OBDD model. It is restricted version of read-once Quantum Branching Programs, with respect to "width" complexity. It is known that maximal complexity gap between deterministic and quantum model is exponential. But there are few examples of such functions. We present method (called "reordering"), which allows to build Boolean function $g$ from Boolean Function $f$, such that if for $f$ we have gap between quantum and deterministic OBDD complexity for natural order of variables, then we have almost the same gap for function $g$, but for any order. Using it we construct the total function $REQ$ which deterministic OBDD complexity is $2^{\Omega(n/\log n)}$ and present quantu…
Quantum algorithms for formula evaluation
2010
We survey the recent sequence of algorithms for evaluating Boolean formulas consisting of NAND gates.
FPGA-based embedded Logic Controllers
2014
In general case, reconfigurable logic controllers (RLC) are included into reactive digital embedded systems, carrying out control for several processes proceeding concurrently. The paper presents a practical application of a formal, rule-based specification language in Gentzen sequent logic, which is used as an intermediate textual description of a control interpreted Petri net. On the other hand exactly the same description serves also as logic design expressions, related with different versions of functionally equivalent concurrent state machine models, considered on Register Transfer Level. The symbolic rule-based specification of Petri net-based embedded Logic Controllers (LCs) can be s…
Multiplexing AER asynchronous channels over LVDS links with flow-control and clock-correction for scalable neuromorphic systems
2017
Paper presented at the 2017 IEEE International Symposium on Circuits and Systems (ISCAS), held in Baltimore, MD, USA, on 28-31 May 2017.
Frequency response of Measurement Current Transformers
2008
In this paper the frequency response of two CTs is experimentally evaluated in the range of 30-600 Hz. A theoretical analysis of CTs behavior has been developed by means of the equivalent circuit. It was shown, by an experimental test, that, for the frequency range analyzed, the transformer equivalent circuit is a valid tool for the evaluation of CT performances.
Fuzzy Logic, Knowledge and Natural Language
2012
This is an introductive study on what Fuzzy Logic is, on the difference between Fuzzy Logic and the other many-valued calculi and on the possible relationship between Fuzzy Logic and the complex sciences. Fuzzy Logic is nowadays a very popular logic methodology. Different kinds of applications in cybernetics, in software programming and its growing use in medicine seems to make Fuzzy Logic, according to someone, the “new” logic of science and technology. In his enthusiastic panegyric of Fuzzy Logic, Kosko (1993) argues that after thirty years from the birth of this calculus, it is time to declare the new era of Fuzzy Logic and to forget the old era of classical logic. I think that this poin…
A Design Theory for Secure Information Systems Design Methods
2006
Many alternative methods for designing secure information systems (SIS) have been proposed to ensure system security. However, within all the literature on SIS methods, there exists little theoretically grounded work that addresses the fundamental requirements and goals of SIS design. This paper first uses design theory to develop a SIS design theory framework that defines six requirements for SIS design methods, and second, shows how known SIS design methods fail to satisfy these requirements. Third, the paper describes a SIS design method that does address these requirements and reports two empirical studies that demonstrate the validity of the proposed framework. peerReviewed