Search results for "gate"
showing 10 items of 1811 documents
Hardware implementation of a robust adaptive filter: Two approaches based in High-Level Synthesis design tools
2009
Abstract Adaptive filters are used in a wide range of applications. Impulsive noise affects the proper operation of the filter and the adaptation process. This noise is one of the most damaging types of signal distortion, not always considered when implementing algorithms. Field Programmable Gate Array (FPGA) are widely used for applications where timing requirements are strict. Nowadays, two main design processes can be followed, namely, Hardware Description Language (HDL) and a High Level Synthesis (HLS) design tool for embedded system design. This paper describes the FPGA implementation of an adaptive filter robust to impulsive noise using two approaches based in HLS and the implementati…
FPGA implementation of a fuel cell emulator
2010
Fuel cell based systems are usually tested with the aid of high-cost and complex auxiliary devices. A fuel cell emulator is an attractive solution for preliminary downward system test. The emulator replaces the effective power source saving cost, volume and hydrogen reserve still ensuring high-accuracy of test results. The use of a highperformance fuel cell model is essential for a successful conclusion of the overall design process. Although the proposed emulator is suitable for each fuel cell type and power level, a 10W Proton Exchange Membrane Fuel Cell emulator is designed and tested. An FPGA based controller models the fuel cell steady-state and dynamic behaviour, including temperature…
Can Atmospheric Neutrons Induce Soft Errors in NAND Floating Gate Memories?
2009
Atmospheric neutrons can interact with the matter inside a microelectronic chip and generate ionizing particles, which in turn can change the state of one or more memory bits [soft error (SE)]. In this letter, we show that SEs are possible in Flash memories, although with extremely low probabilities. While this problem will increase for future technologies, we do not expect SEs to be the reliability limiting factor for further floating gate scaling.
Optimum design of two-level MCML gates
2008
In this paper, we address the problem of the optimum design of two-level MOS Current Mode Logic (MCML) gates. In particular, we describe a design methodology based on the concept of crossing-point current already introduced for the optimum design of single-level MCML gates. This methodology is suited both for automated implementation and graphic estimate of the optimum design. Moreover, it clearly shows how some important design parameters affect the optimum values of delay and power consumption. Several gates were designed in an IBM 130 nm CMOS technology. The results of SPICE simulations, reported here, demonstrate the effectiveness of the proposed design methodology.
Fully digital FPGA-based Front-End Electronics for the GALILEO array
2014
In this work we present the fully digital Front End Electronics (FEE) read out system developed for the GALILEO array. The system, developed in collaboration with the Advanced Gamma Tracking Array (AGATA) collaboration, is composed of three main blocks: preamplifiers, digitizers and preprocessing electronics. The slow control system contains a custom Linux driver, a dynamic library and a server implementing network services. The digital processing of the data from the GALILEO germanium detectors has demonstrated the capability to achieve an energy resolution of 1.53‰ at an energy of 1.33 MeV.
A capacitor selector tool for on-board PDN designs in multigigabit applications
2011
This paper presents a capacitor selector software tool for a proper on-board Power Distribution Network (PDN) design in those high-speed applications which have strict requirements on voltage noise up to the first hundreds of megahertz. Current commercial tools for PDN design only offer a manual choice of the capacitor value and their number simulating the board impedance profile. This manual resolution becomes very hard when the design has high power consumption and noise requirements are very strict. The aim of this software is to solve a basic on-board PDN design minimizing the number of "change simulate-analyze" iterations that have to be carried out in the manual PDN design. This softw…
Design of a mezzanine card with bandwidth aggregation for HPGe gamma spectroscopy
2016
In experimental nuclear physics, HPGe segmented detectors are used to provide high energy resolution of the gamma rays. Besides, 4pi configuration is common to get a full coverage of the interaction point and detection of all the products of the collisions. In this type of experiments, the number of electronic channels can be high (>100) and also the sampling frequency of the digitizing system (>100 Msps). This results in a high data rate per channel (> 2 Gbps) and thus a high aggregated bandwidth to process. In principle, this problem can be solved using a parallel data acquisition system where the input channels (commonly arriving through optical fibers) are read and processed accordingly…
Exploring FPGA‐Based Lock‐In Techniques for Brain Monitoring Applications
2017
Functional near‐infrared spectroscopy (fNIRS) systems for e‐health applications usually suffer from poor signal detection, mainly due to a low end‐to‐end signal‐to‐noise ratio of the electronics chain. Lock‐in amplifiers (LIA) historically represent a powerful technique helping to improve performance in such circumstances. In this work a digital LIA system, based on a Zynq® field programmable gate array (FPGA) has been designed and implemented, in an attempt to explore if this technique might improve fNIRS system performance. More broadly, FPGA‐based solution flexibility has been investigated, with particular emphasis applied to digital filter parameters, needed in the digital LIA, and its …
Immunochemical rapid determination of quinoxyfen, a priority hazardous pollutant
2018
In 2013, quinoxyfen was included in the list of priority hazard pollutants of the European Water Framework Directive due to its toxicity to aquatic organisms. However, few analytical methods for the analysis of this fungicide have been reported and no rapid immunochemical methods have been published so far. In the present study, immunoreagents for quinoxyfen analysis were generated for the first time and an enzyme-linked immunosorbent assay was developed. Two carboxylated derivatives of quinoxyfen were designed on the basis of the minimum energy conformation of the target compound. Active esters of those novel compounds were prepared using N,N′-disuccinimidyl carbonate, and purified for cov…
The use of lightweight expanded clay aggregate (LECA) as sorbent for PAHs removal from water.
2012
Author's version of an article in the journal: Journal of Hazardous Materials. Also available from the publisher at: http://dx.doi.org/10.1016/j.jhazmat.2012.03.038 Lightweight expanded clay aggregate (LECA) has been explored as a sorbent for the removal of PAHs (phenanthrene, fluoranthene and pyrene) from water. The efficacy of LECA as a sorbent for PAHs was assessed using contact time, mass of sorbent and sorption isotherms in a series of batch experiments. Maximum (optimum) sorption was reached at 21 h after which the amount of PAHs sorbed remained almost constant. Batch experiments were conducted by shaking a 100 ml solution mixture of individual PAHs (containing 0.02 mg/L) with LECA. T…