Search results for "Hardware_LOGICDESIGN"
showing 10 items of 50 documents
Progress towards innovative and energy efficient logic circuits
2020
Abstract The integration of superconductive nanowire logic memories and energy efficient computing Josephson logic is explored. Nanowire memories are based on the integration of switchable superconducting nanowires with a suitable magnetic material. These memories exploit the electro-thermal operation of the nanowires to efficiently store and read a magnetic state. In order to achieve proper memory operation a careful design of the nanowire assembly is necessary, as well as a proper choice of the magnetic material to be employed. At present several new superconducting logic families have been proposed, all tending to minimize the effect of losses in the digital Josephson circuits replacing …
Lumped parameter approach of nonlinear networks with transistors
1991
In this chapter we study the lumped parameter modelling of a large class of circuits composed of bipolar transistors, junction diodes and passive elements (resistors, capacitors, inductors). All these elements are nonlinear: the semiconductor components are modelled by “large signal” equivalent schemes, the capacitors and inductors have monotone characteristics while the resistors can be included in a multiport which also has a monotone description.
Nanorings and rods interconnected by self-assembly mimicking an artificial network of neurons
2013
[EN] Molecular electronics based on structures ordered as neural networks emerges as the next evolutionary milestone in the construction of nanodevices with unprecedented applications. However, the straightforward formation of geometrically defined and interconnected nanostructures is crucial for the production of electronic circuitry nanoequivalents. Here we report on the molecularly fine-tuned self-assembly of tetrakis-Schiff base compounds into nanosized rings interconnected by unusually large nanorods providing a set of connections that mimic a biological network of neurons. The networks are produced through self-assembly resulting from the molecular conformation and noncovalent intermo…
Single electron transistor fabricated on heavily doped silicon-on-insulator substrate
2001
Experiments on side-gated silicon single electron transistors (SET) fabricated on a heavily doped thin silicon-on-insulator substrate are reported. Some of the devices showed single-island-like and some multi-island-like behaviour, but the properties of individual samples changed with time. Single-electron gate modulation was observable up to T=100 K, at least. A slow response of SET current to a large change in gate voltage was observed, but the process speeded up under illumination.
Controlling the mode of operation of organic transistors through side chain engineering
2016
Electrolyte-gated organic transistors offer low bias operation facilitated by direct contact of the transistor channel with an electrolyte. Their operation mode is generally defined by the dimensionality of charge transport, where a field-effect transistor allows for electrostatic charge accumulation at the electrolyte/semiconductor interface, whereas an organic electrochemical transistor (OECT) facilitates penetration of ions into the bulk of the channel, considered a slow process, leading to volumetric doping and electronic transport. Conducting polymer OECTs allow for fast switching and high currents through incorporation of excess, hygroscopic ionic phases, but operate in depletion mode…
CNT-based RFID passive gas sensor
2011
Summary form only given, as follows. Single-wall carbon nanotube (CNT) is examined for the design of a passive and maintenance-free wireless RFID sensor. CNT buckypaper is characterized from a dielectric and a sensitivity point of view, using an indirect way, by using antenna measurement and simulations in a controlled medium. A CNT-based prototype RFID tag is then described as the featured maintenance free sensor and experimentally verified for its applicability and sensitivity towards NH3.
TID and SEE Tests of an Advanced 8 Gbit NAND-Flash Memory
2008
We report on the dose and operational mode dependence of error percentage, stand-by current, erase and write time of 8 Gbit / 4 Gbit NAND-flash memories as well as on their static, dynamic and SEFI cross sections.
Statistical Analysis of Heavy-Ion Induced Gate Rupture in Power MOSFETs—Methodology for Radiation Hardness Assurance
2012
A methodology for power MOSFET radiation hardness assurance is proposed. It is based on the statistical analysis of destructive events, such as gate oxide rupture. Examples of failure rate calculations are performed.
Electron Ion Collider: The Next QCD Frontier: Understanding the glue that binds us all
2016
International audience; This White Paper presents the science case of an Electron-Ion Collider (EIC), focused on the structure and interactions of gluon-dominated matter, with the intent to articulate it to the broader nuclear science community. It was commissioned by the managements of Brookhaven National Laboratory (BNL) and Thomas Jefferson National Accelerator Facility (JLab) with the objective of presenting a summary of scientific opportunities and goals of the EIC as a follow-up to the 2007 NSAC Long Range plan. This document is a culmination of a community-wide effort in nuclear science following a series of workshops on EIC physics over the past decades and, in particular, the focus…
Concatenated logic functions using nanofluidic diodes with all-electrical inputs and outputs
2018
[EN] Nanopore-based logical schemes in ionic solutions typically involve single gates and chemical inputs. The design of computer-like functions requires the consecutive concatenation of several gates and the use of electrical potentials and currents to facilitate the downstream transfer of electrochemical information. We have demonstrated the robust operation of concatenated logic functions using biomimetic nanofluidic diodes based on single pore membranes. To this end, we have implemented first the logic functions AND and OR with combinations of single nanopores using all-electrical input and output signals. The concatenation of these gates allows the output of the OR gate to act as one o…