6533b7cefe1ef96bd125705b

RESEARCH PRODUCT

Effect of high temperature annealing (T > 1650 °C) on the morphological and electrical properties of p-type implanted 4H-SiC layers

S. Di FrancoAndrea SeverinoMonia SperaMonia SperaPatrick FiorenzaFabrizio RoccaforteGiuseppe GrecoDomenico CorsoFilippo Giannazzo

subject

4H-SiCMaterials scienceFabricationAnnealing (metallurgy)Analytical chemistrychemistry.chemical_element02 engineering and technologyActivation energy01 natural sciencesIonAluminium0103 physical sciencesSurface roughnessGeneral Materials ScienceElectrical measurements010302 applied physicsCondensed Matter - Materials ScienceMechanical EngineeringPhysics - Applied Physics021001 nanoscience & nanotechnologyCondensed Matter PhysicsAcceptorPost implantation annealingchemistryMechanics of MaterialsElectrical activationp-type implantation0210 nano-technology

description

This work reports on the effect of high temperature annealing on the electrical properties of p-type implanted 4H-SiC. Ion implantations of Aluminum (Al) at different energies (30-200 keV) were carried out to achieve 300 nm thick acceptor box profiles with a concentration of about 10(20) at/cm(3). The implanted samples were annealed at high temperatures (1675-1825 degrees C). Morphological analyses of the annealed samples revealed only a slight increase of the surface roughness RMS up to 1775 degrees C, while this increase becomes more significant at 1825 degrees C (RMS = 1.2 nm). Room temperature Hall measurements resulted in a hole concentration in the range 0.65-1.34 x 10(18)/cm(3) and mobility values in the order of 21-27 cm(2) V-1 s(-1). The temperature dependent electrical measurements allowed to estimate an activation energy of the Al-implanted specie of about 110 meV (for the post-implantation annealing at 1675 degrees C) and a fraction of active p-type Al-dopant ranging between 39% and 56%. The results give useful indications for the fabrication of 4H-SiC JBS and MOSFETs.

yearjournalcountryeditionlanguage
2019-01-01Materials Science in Semiconductor Processing
10.1016/j.mssp.2019.01.019http://dx.doi.org/10.1016/j.mssp.2019.01.019