Search results for "Non-volatile memory"
showing 10 items of 20 documents
Peculiar aspects of nanocrystal memory cells: Data and extrapolations
2003
Nanocrystal memory cell are a promising candidate for the scaling of nonvolatile memories in which the conventional floating gate is replaced by an array of nanocrystals. The aim of this paper is to present the results of a thorough investigation of the possibilities and the limitations of such new memory cell. In particular, we focus on devices characterized by a very thin tunnel oxide layer and by silicon nanocrystals formed by chemical vapor deposition. The direct tunneling of the electrons through the tunnel oxide, their storage into the silicon nanocrystals, and furthermore, retention, endurance, and drain turn-on effects, well-known issues for nonvolatile memories, are all investigate…
TID and SEE Tests of an Advanced 8 Gbit NAND-Flash Memory
2008
We report on the dose and operational mode dependence of error percentage, stand-by current, erase and write time of 8 Gbit / 4 Gbit NAND-flash memories as well as on their static, dynamic and SEFI cross sections.
Strain-induced improvement of retention loss in PbZr0.2Ti0.8O3 films
2015
The retention behavior of nanoscale domains in PbZr0.2Ti0.8O3 thin films is investigated by in-situ controlling the epitaxial strain arising from a piezoelectric substrate. The retention behavior in our sample shows strong polarity-dependence: Upward-poled domains exhibit excellent stability, whereas downward-poled domains reveal a stretched exponential decay. Reversible release of in-plane compressive strain strongly reduced the retention loss, reflected in an enhancement of the relaxation time by up to one order of magnitude. We tentatively attribute the observed behavior to a strain dependence of the built-in field at the interface to the La0.7Sr0.3MnO3 bottom electrode, with a possible …
Single-Event Effects in the Peripheral Circuitry of a Commercial Ferroelectric Random Access Memory
2018
International audience; This paper identifies the failure modes of a commercial 130-nm ferroelectric random access memory. The devices were irradiated with heavy-ion and pulsed focused X-ray beams. Various failure modes are observed, which generate characteristic error patterns, affecting isolated bits, words, groups of pages, and sometimes entire regions of the memory array. The underlying mechanisms are discussed.
Radiation tolerance of NROM embedded products
2010
Radiation tolerance of NROM memories is demonstrated at the level of industrial 4 Mbit memory embedded modules, specifically not designed for operation in radiation harsh environments. The memory fabricated in 0.18 um technology remains fully functional after total ionization doses exceeding 100 krad. The tests were performed by irradiating with γ-rays (60Co source) and 10 MeV 11B ions in active (during programming/erase and read-out) and passive (no bias) modes. Comprehensive statistics were obtained by using large memory arrays and comparison of the data with the parameters of irradiated single cells allowed deep understanding of the physical phenomena in the irradiated NROM devices for b…
Traces of errors due to single ion in floating gate memories
2008
Single, high energy, high LET, ions impacting on a Floating gate array at grazing or near-grazing angles lead to the creation of long traces of FGs with corrupted information. Every time a FG is crossed by a single ion, it experiences a charge loss which permanently degrades the stored information. If the ion crosses more than one FG, the threshold voltage of all those FGs interested by its track will be degraded.
Effect of Ion Energy on Charge Loss From Floating Gate Memories
2008
Heavy ions typical of the space environment have energies which exceed by orders of magnitude those available at particle accelerators. In this paper we are irradiating state of the art floating gate memories by using both a medium energy (SIRAD) and a high energy (RADEF) facilities. The corruption of stored information decreases when increasing ion energy. The proposed model deals with the broader track found for higher energy ions. Implications for testing procedures and for reliability considerations are discussed.
Effects of Scaling in SEE and TID Response of High Density NAND Flash Memories
2010
Heavy ion single-event effect (SEE) measurements and total ionizing dose (TID) response for Micron Technology single-level cell 1, 2, 4, 8 Gb commercial NAND flash memory and multi-level cell 8, 16, 32 Gb are reported. The heavy ion measurements were extended down to LET 0.1 MeV-cm2/mg. Scaling effects in SEE and TID response are discussed. Floating gate bit error upset cross section does not scale with feature size at high LETs, except for single-level cell 8 Gb device which is built with 51 nm processes. The threshold LET does not change with scaling. Charge pump TID degradation and standby current improves with scaling. In general, the effect of radiation is either unchanged or is less s…
Magnetic domain-wall racetrack memory for high density and fast data storage
2012
The racetrack memory device is a new concept of Magnetic RAM (MRAM) based on controlling domain wall (DW) motion in ferromagnetic nanowires. It promises ultra-high storage density thanks to the possibility to store multiple narrow DWS per memory cell. By using read and write heads based on magnetic tunnel junctions (MTJ) with perpendicular magnetic anisotropy (PMA) fast data access speed can also be achieved. Thereby the racetrack memory can be used as universal storage to address both embedded and standalone applications. In this paper, we present the device physics, integration circuit and architecture designs of a racetrack memory based on MTJs with PMA. Mixed SPICE simulations at 65 nm …
Single Event Upsets Induced by Direct Ionization from Low-Energy Protons in Floating Gate Cells
2017
Floating gate cells in advanced NAND Flash memories, with single-level and multi-level cell architecture, were exposed to low-energy proton beams. The first experimental evidence of single event upsets by proton direct ionization in floating gate cells is reported. The dependence of the error rate versus proton energy is analyzed in a wide energy range. Proton direct ionization events are studied and energy loss in the overlayers is discussed. The threshold LET for floating gate errors in multi-level and single-level cell devices is modeled and technology scaling trends are analyzed, also discussing the impact of the particle track size. peerReviewed