Search results for "Volatile memory"
showing 10 items of 23 documents
Online Management of Hybrid DRAM-NVMM Memory for HPC
2019
Non-volatile main memories (NVMMs) offer a comparable performance to DRAM, while requiring lower static power consumption and enabling higher densities. NVMM therefore can provide opportunities for improving both energy efficiency and costs of main memory. Previous hybrid main memory management approaches for HPC either do not consider the unique characteristics of NVMMs, depend on high profiling costs, or need source code modifications. In this paper, we investigate HPC applications' behaviors in the presence of NVMM as part of the main memory. By performing a comprehensive study of HPC applications and based on several key observations, we propose an online hybrid memory architecture for …
Influence of the exchange and correlation functional on the structure of amorphous InSb and In3SbTe2 compounds
2016
We have investigated the structural, vibrational, and electronic properties of the amorphous phase of InSb and In3SbTe2 compounds of interest for applications in phase change non-volatile memories. Models of the amorphous phase have been generated by quenching from the melt by molecular dynamics simulations based on density functional theory. In particular, we have studied the dependence of the structural properties on the choice of the exchange-correlation functional. It turns out that the use of the Becke-Lee-Yang-Parr functional provides models with a much larger fraction of In atoms in a tetrahedral bonding geometry with respect to previous results obtained with the most commonly used P…
Persistent software transactional memory in Haskell
2021
Emerging persistent memory in commodity hardware allows byte-granular accesses to persistent state at memory speeds. However, to prevent inconsistent state in persistent memory due to unexpected system failures, different write-semantics are required compared to volatile memory. Transaction-based library solutions for persistent memory facilitate the atomic modification of persistent data in languages where memory is explicitly managed by the programmer, such as C/C++. For languages that provide extended capabilities like automatic memory management, a more native integration into the language is needed to maintain the high level of memory abstraction. It is shown in this paper how persiste…
Compact instrumentation for radiation tolerance test of flash memories in space environment
2010
Aim of this work is the description of a test equipment, designed to be integrated on board of a microsatellite, able to investigate the radiation tolerance of non-volatile memory arrays in a real flight experiment. An FPGA-based design was adopted to preserve a high flexibility degree. Besides standard Program/Read/Erase functions, additional features such as failure data screening and latch-up protection have been implemented. The instrument development phase generated, as a by-product, a non-rad-hard version of the instrument that allowed performing in-situ experiments using 60Co and 10 MeV Boron irradiation facilities on Ground. Preliminary measurement results are reported to show the i…
Can Atmospheric Neutrons Induce Soft Errors in NAND Floating Gate Memories?
2009
Atmospheric neutrons can interact with the matter inside a microelectronic chip and generate ionizing particles, which in turn can change the state of one or more memory bits [soft error (SE)]. In this letter, we show that SEs are possible in Flash memories, although with extremely low probabilities. While this problem will increase for future technologies, we do not expect SEs to be the reliability limiting factor for further floating gate scaling.
Comparison of TID response and SEE characterization of single- and multi-level high density NAND flash memories
2009
Heavy ion single-event measurements and total ionizing dose (TID) response for 8Gb commercial NAND flash memories are reported. Radiation results of multilevel flash technology are compared with results from single-level flash technology. The single-level devices are less sensitive to single event upsets (SEUs) than multi-level devices. In general, these commercial high density memories exhibit less TID degradation compared to older generations of flash memories. The charge pump in this study survived up to 600 krads.
Heavy-Ion Radiation Impact on a 4 Mb FRAM Under Different Test Modes and Conditions
2016
International audience; The impact of heavy-ions on commercial Ferroelectric Memories (FRAMs) is analyzed. The influence of dynamic and static test modes as well as several stimuli on the error rate of this memory is investigated. Static test results show that the memory is prone to temporary effects occurring in the peripheral circuitry, with a possible effect due to fluence. Dynamic tests results show a high sensitivity of this memory to switching activity of this peripheral circuitry.
Improving Collective I/O Performance Using Non-volatile Memory Devices
2016
Collective I/O is a parallel I/O technique designed to deliver high performance data access to scientific applications running on high-end computing clusters. In collective I/O, write performance is highly dependent upon the storage system response time and limited by the slowest writer. The storage system response time in conjunction with the need for global synchronisation, required during every round of data exchange and write, severely impacts collective I/O performance. Future Exascale systems will have an increasing number of processor cores, while the number of storage servers will remain relatively small. Therefore, the storage system concurrency level will further increase, worseni…
Heavy-Ion Radiation Impact on a 4Mb FRAM under Different Test Conditions
2015
The impact of heavy-ions on commercial Ferroelectric Memories (FRAMs) is analyzed. The influence of different test modes (static and dynamic) on this memory is investigated. Static test results show that the memory is prone to temporary effects occurring in the peripheral circuitry. Dynamic tests results show a high sensitivity of this memory to heavy-ions.
Resistive switching behaviour in ZnO and VO 2 memristors grown by pulsed laser deposition
2014
The resistive switching behaviour observed in microscale memristors based on laser ablated ZnO and VO 2 is reported. A comparison between the two materials is reported against an active device size. The results show that devices up to 300 × 300 μm 2 exhibit a memristive behaviour regardless of the device size, and 100 × 100 μm 2 ZnO-based memristors have the best resistance off/on ratio.