Heavy-Ion-Induced Degradation in SiC Schottky Diodes : Incident Angle and Energy Deposition Dependence

International audience; Heavy-ion-induced degradation in the reverse leakage current of SiC Schottky power diodes exhibits a strong dependence on the ion angle of incidence. This effect is studied experimentally for several different bias voltages applied during heavy-ion exposure. In addition, TCAD simulations are used to give insight on the physical mechanisms involved.

Semi-Empirical Model for SEGR Prediction

The underlying physical mechanisms in single event gate rupture (SEGR) are not known precisely. SEGR is expected to occur when the energy deposition due to a heavy ion strike exceeds a certain threshold simultaneously with sufficient electric field across the gate dielectric. Typically the energy deposition is described by using the linear energy transfer (LET) of the given ion. Previously the LET has been demonstrated not to describe the SEGR sufficiently. The work presented here introduces a semi-empirical model for the SEGR prediction based on statistical variations in the energy deposition which are described theoretically.

Statistical Analysis of Heavy-Ion Induced Gate Rupture in Power MOSFETs—Methodology for Radiation Hardness Assurance

A methodology for power MOSFET radiation hardness assurance is proposed. It is based on the statistical analysis of destructive events, such as gate oxide rupture. Examples of failure rate calculations are performed.

SEGR in SiO<inf>2</inf>-Si<inf>3</inf>N<inf>4</inf> stacks

Microbeam SEE Analysis of MIM Capacitors for GaN Amplifiers

Broad-beam and microbeam single-event effect tests were performed on metal–insulator–metal capacitors with three different thicknesses of silicon nitride (Si3N4) dielectric insulator: 250, 500, and 750 nm. The broad-beam tests indicated that the devices with the thicker, 500- and 750-nm dielectric did not have a greater breakdown voltage. The surrounding structures of the capacitor were suspected to be a possible cause. Microbeam techniques made it possible to localize the failure location for the 500- and 750-nm devices. The failure occurs in the air bridge structure connected to the top capacitor plate, which can therefore be considered as an edge effect, while for the 250-nm devices, the…

SEGR in SiO${}_2$–Si$_3$N$_4$ Stacks

Abstract. This work presents experimental Single Event Gate Rupture (SEGR) data for Metal–Insulator–Semiconductor (MIS) devices, where the gate dielectrics are made of stacked SiO2–Si3N4 structures. A semi-empirical model for predicting the critical gate voltage in these structures under heavy-ion exposure is first proposed. Then interrelationship between SEGR cross- section and heavy-ion induced energy deposition probability in thin dielectric layers is discussed. Qualitative connection between the energy deposition in the dielectric and the SEGR is proposed. peerReviewed

Heavy-Ion-Induced Degradation in SiC Schottky Diodes : Incident Angle and Energy Deposition Dependence

Heavy-ion-induced degradation in the reverse leakage current of SiC Schottky power diodes exhibits a strong dependence on the ion angle of incidence. This effect is studied experimentally for several different bias voltages applied during heavy-ion exposure. In addition, TCAD simulations are used to give insight on the physical mechanisms involved. peerReviewed

Influence of beam conditions and energy for SEE testing

GANIL/Applications industrielles; The effects of heavy-ion test conditions and beam energy on device response are investigated. These effects are illustrated with two types of test vehicles: SRAMs and power MOSFETs. In addition, GEANT4 simulations have also been performed to better understand the results. Testing to high fluence levels is required to detect rare events. This increases the probability of nuclear interactions. This is typically the case for power MOSFETs, which are tested at high fluences for single event burnout or gate rupture detection, and for single-event-upset (SEU) measurement in SRAMs below the direct ionization threshold. Differences between various test conditions (…