6533b853fe1ef96bd12ac10c
RESEARCH PRODUCT
How far will Silicon nanocrystals push the scaling limits of NVMs technologies?
Isodiana CrupiV. AncaraniDaniele IelminiR. A. PuglisiRoberto BezAlain ToffoliEmanuele RiminiAlessandro S. SpinelliP. MurL. PerniolaGerard GhibaudoChristian Monzio CompagnoniL. BaldiD. CorsoB. De SalvoA.l. LacaitaDenis MariolleSalvatore LombardoSimon DeleonibusCosimo GerardiG. PananakakisFrédéric MazenK. Van Der JeugdMarc GelyThierry BaronGiuseppe NicotraM. MelanotteY. M. WanM.n. SémériaG. Ammendolasubject
Materials sciencesezeleSiliconbusiness.industryNAND gatechemistry.chemical_elementNanotechnologyChemical vapor depositionSettore ING-INF/01 - ElettronicaThreshold voltageNanocrystalNanoelectronicschemistryOptoelectronicsElectrical and Electronic EngineeringbusinessScience technology and societyScalingdescription
For the first time, memory devices with optimized high density (2E12#/cm/sup 2/) LPCVD Si nanocrystals have been reproducibly achieved and studied on an extensive statistical basis (from single cell up to 1 Mb test-array) under different programming conditions. An original experimental and theoretical analysis of the threshold voltage shift distribution shows that Si nanocrystals have serious potential to push the scaling of NOR and NAND flash at least to the 35 nm and 65 nm nodes, respectively.
| year | journal | country | edition | language |
|---|---|---|---|---|
| 2004-03-22 |